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141.发明申请公开(公告)号：US20190391449A1
公开(公告)日：2019-12-26
申请号：US16081703
申请日：2018-01-22
Inventor： Ruijun HAO , Wulijibaier TANG , Long LIAN , Zhongping ZHAO , Yanling FENG , Haifeng BI , Xintong FAN
IPC: G02F1/1335 , F21V8/00 , H01L27/32
Abstract: The present disclosure provides a light guide assembly, a fabrication method thereof, a backlight module, and a display device. The light guide assembly includes: a light guide plate having a light exit surface and a back surface opposite to each other, and a side surface contacting the light exit surface and the back surface; a first reflective layer disposed on the light exit surface and having a plurality of light transmissive holes; a diffusion layer disposed on a side of the first reflective layer facing away from the light guide plate. The diffusion layer includes a plate and a plurality of protrusions disposed on the surface of the plate, the plurality of protrusions are in one-to-one correspondence with the plurality of the light transmissive holes, and each light transmissive hole receives a corresponding protrusion.
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公开(公告)号：US20190385688A1
公开(公告)日：2019-12-19
申请号：US16477362
申请日：2018-08-23
Inventor： Yishan Fu , Jun Fan , Fuqiang Li , Han Zhang
Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: an input circuit used to provide a pull-up node with a first control signal from a first control signal terminal; N output circuits, wherein an i-th output circuit is used to provide an i-th output terminal with an i-th clock signal from an i-th clock signal terminal; a pull-down control circuit used to provide a pull-down node with a first power source signal from a first power source terminal, and to provide the pull-down node with a second power source signal from a second power source terminal; and a pull-down circuit used to provide each output terminal and the pull-up node with the second power source signal.
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143.发明授权公开(公告)号：US10510428B2
公开(公告)日：2019-12-17
申请号：US15772410
申请日：2017-10-30
Inventor： Jiguo Wang , Jun Fan , Fuqiang Li
Abstract: Embodiments of the present disclosure provide a shift register circuitry and a driving method thereof, a gate driving circuitry, and a display device. The shift register circuitry includes an input circuit and a plurality of output circuits coupled to the input circuit. The input circuit is coupled to an input signal terminal, and is configured to, under the control of the voltage at the input signal terminal, cause the plurality of output circuits to operate. Each of the plurality of output circuits is coupled to a respective clock signal terminal and a respective output signal terminal, and is configured to operate to couple the clock signal terminal to the output signal terminal so as to output a driving signal at the output signal terminal.
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公开(公告)号：US10509526B2
公开(公告)日：2019-12-17
申请号：US15259459
申请日：2016-09-08
Inventor： Ruizhi Yang , Yanqing Chen , Yanfeng Li
IPC: G06F3/046 , G06F3/041 , G02F1/1333 , G02F1/1335
Abstract: Disclosed are a three-dimensional (3D) touch control structure and a display device. The three-dimensional (3D) touch control structure includes: a plurality of magnetic field generating components arranged into an array, and a plurality of electromagnetic inducting components in one-to-one correspondence and arranged in different layers to the magnetic field generating components; wherein a distance exists between the magnetic field generating components and the corresponding electromagnetic inducting components, and the magnetic field generating components are configured for generating magnetic fields and the electromagnetic inducting components are configured for changing in induced potential during touch control.
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公开(公告)号：US20190355936A1
公开(公告)日：2019-11-21
申请号：US16201245
申请日：2018-11-27
Inventor： Jianqiang WANG , Jin XU , Ning AO , Qi LIU
Abstract: This disclosure relates to a display and a method of fabricating the display. According to some embodiments, the display may comprise: an encapsulation sidewall; at least one isolation column adjacent to the encapsulation sidewall; and a processing module coupled with the at least one isolation column, configured to apply a voltage signal to the at least one isolation column according to a height of the encapsulation sidewall, such that the at least one isolation column deforms.
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Patent Agency Ranking
公开(公告)号：US10481427B2
公开(公告)日：2019-11-19
申请号：US15541813
申请日：2017-01-10
Inventor： Dawei Shi
IPC: G02F1/1362 , G02F1/1335 , G06F3/041
Abstract: An array substrate, a manufacturing method, a display panel and an electronic device are provided. The array substrate includes a substrate, and a gate line, an insulation layer, an active layer and a data line which are formed on the substrate. The insulation layer is provided on the gate line, the data line is provided on the gate line through the insulation layer and is crossed with the gate line, and the active layer is provided between the gate line and the data line in a direction perpendicular to the substrate, and a first shield layer is provided on the gate line through the insulation layer, and the first shield layer covers the gate line in the direction perpendicular to the substrate and is electrically insulated from the gate line, the active layer and the data line.
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公开(公告)号：US10476041B2
公开(公告)日：2019-11-12
申请号：US15550755
申请日：2017-01-23
Inventor： Tao Yang , Wei Song , Zenghong Li , Peng Chen , Lin Liu , Yonghong Zhang , Ling Tong , Yaorong Liu
Abstract: A method for manufacturing an OLED panel is provided by embodiments of the present disclosure, including following steps of: manufacturing an OLED motherboard which comprises a plurality of OLED panel areas spaced apart from one another, each comprising a display region and a frit package region which is located on a periphery of the display region and is to encapsulate the display region by a frit; and cutting the OLED motherboard along a cutting line to obtain separated OLED panels; and the cutting line is located within the frit package region and at a predetermined distance inwards from an edge of the periphery of the frit package region.
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公开(公告)号：US10452190B2
公开(公告)日：2019-10-22
申请号：US15484259
申请日：2017-04-11
Inventor： Xiangdong Wei , Jing Liu , Xiang Feng , Yun Qiu
IPC: G06F3/041 , H01L27/12 , G02F1/1362 , G02F1/1343 , G09G3/36 , G02F1/1333 , G02F1/1368 , G06F3/044
Abstract: Embodiments of the present disclosure relate to the field of display technologies, and particularly, to an array substrate and methods of manufacturing and driving the same. With the embodiments of the present disclosure, undesirable phenomenon, e.g. color mixing and so on is avoid in a display device having the array substrate while simplifying the manufacture process of the array substrate. The array substrate comprises a substrate, thin-film transistors, pixel electrodes and a common electrode on the substrate, a plurality of leading wires and a color filter layer; wherein the common electrode comprises a plurality of common electrode blocks reusable as self-capacitance electrodes, and each of the leading wires has one end electrically connected to one of the common electrode blocks and the other end electrically connected to a touch integrated circuit. The array substrate according to the embodiments of the present disclosure is used in the display device.
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149.发明申请公开(公告)号：US20190294289A1
公开(公告)日：2019-09-26
申请号：US16123654
申请日：2018-09-06
Inventor： Shaolei ZONG , Jieqiong WANG , Jigang SUN
IPC: G06F3/041
Abstract: A display touch scanning method, a non-volatile storage medium, a display touch scanning chip and a display apparatus are disclosed. The display touch scanning method including: dividing one frame of display scan into M display time periods to be sequentially executed, and dividing one frame of touch scan into N touch time periods to be sequentially executed; and performing the touch scan using different touch loads in at least two adjacent touch time periods, or performing the display scan using different display loads in at least two adjacent display time periods. The M display time periods and the N touch time periods are interlaced, and M and N are integers greater than or equal to 2.
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公开(公告)号：US10424669B2
公开(公告)日：2019-09-24
申请号：US15747687
申请日：2017-06-27
Inventor： Zhixuan Guo , Fengguo Wang , Xinguo Wu , Hong Liu , Zifeng Wang , Yuanbo Li , Feng Li , Bo Ma
IPC: H01L29/786 , H01L27/12 , G02F1/1368 , G02F1/1362
Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate; a first conductive layer located on the base substrate, including a source electrode of a switching element; and a color filter layer located on the first conductive layer, wherein the source electrode of the switching element and the color filter layer are abutted in a direction perpendicular to the base substrate.
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