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公开(公告)号：US12088939B2
公开(公告)日：2024-09-10
申请号：US18155189
申请日：2023-01-17
Applicant: CANON KABUSHIKI KAISHA
Inventor： Takafumi Kishi
IPC: H04N25/75 , H01L27/146 , H04N25/767 , H04N25/79
CPC classification number: H04N25/75 , H01L27/14634 , H01L27/14636 , H01L27/14638 , H01L27/1464 , H04N25/767 , H04N25/79 , H01L27/14643
Abstract: An image pickup device which suppresses an increase in chip area of peripheral circuits without degrading the performance of a pixel section and makes it possible to prevent costs from being increased. The image pickup device includes a first semiconductor substrate and a second semiconductor substrate. A pixel section includes photo diodes each for generate electric charges by photoelectric conversion, floating diffusions each for temporarily storing the electric charges generated by the photo diode, and amplifiers each connected to the floating diffusion, for outputting a signal dependent on a potential of the associated floating diffusion. Column circuits are connected to vertical signal lines, respectively, for performing predetermined processing on signals output from the pixel section to vertical signal lines.
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公开(公告)号：US12075177B2
公开(公告)日：2024-08-27
申请号：US17756245
申请日：2020-10-14
Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Inventor： Atsushi Kato
CPC classification number: H04N25/75 , H01L24/08 , H01L27/14634 , H04N17/002 , H04N25/77 , H04N25/79 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/08145 , H01L2224/16145 , H01L2224/32145 , H01L2224/73204
Abstract: Provided is a semiconductor device including a first charge accumulation unit capable of accumulating a charge, a first initialization unit that is connected to the first charge accumulation unit and initializes the first charge accumulation unit; and a first voltage switching unit that is connected to the first initialization unit and is capable of selectively supplying a first voltage and a second voltage different from the first voltage to the first initialization unit.
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公开(公告)号：US20240284064A1
公开(公告)日：2024-08-22
申请号：US18444419
申请日：2024-02-16
Applicant: CANON KABUSHIKI KAISHA
Inventor： MAHITO SHINOHARA
IPC: H04N25/63 , G01S7/4863 , G01S17/894 , H01L23/00 , H01L27/146 , H04N25/77 , H04N25/79
CPC classification number: H04N25/63 , G01S7/4863 , G01S17/894 , H01L24/08 , H01L27/1461 , H01L27/1463 , H01L27/1465 , H04N25/77 , H01L2224/08145 , H04N25/79
Abstract: A photoelectric conversion device includes a photoelectric conversion unit including a first semiconductor region, a second semiconductor region, and a third semiconductor region forming a p-n junction with the second semiconductor region, and a control circuit for switching a voltage of a reverse bias voltage applied between the first and the second semiconductor regions between first and second voltages. The photoelectric conversion device performs a period in which the reverse bias voltage is set to the first voltage to accumulate signal charge in the third semiconductor region, and a period in which the reverse bias voltage is set to the second voltage to enable transfer of signal charge to the first semiconductor region, and avalanche multiplication at the p-n junction between the first and second semiconductor regions. The control circuit switches between the first voltage and the second voltage by changing the reverse bias voltage to a rectangular shape.
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公开(公告)号：US20240282799A1
公开(公告)日：2024-08-22
申请号：US18170030
申请日：2023-02-16
Inventor： Chih-Kuan Yu , U-Ting Chiu , Shen-Hui Hong , Feng-Chi Hung , Jen-Cheng Liu , Dun-Nian Yaung
IPC: H01L27/146 , H04N25/79
CPC classification number: H01L27/14643 , H01L27/14612 , H01L27/14689 , H04N25/79
Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a first chip stacked with a second chip. The first chip comprises a first substrate and a photodetector disposed in the first substrate. A first transistor is disposed on the first substrate and neighbors the photodetector. A plurality of second transistors is disposed within or on the stacked first and second chips. The plurality of second transistors comprises a first readout transistor having a first readout gate electrode over a first readout gate dielectric structure. The first readout gate dielectric structure comprises a lower dielectric layer stacked with an upper dielectric structure. A relative permittivity of the upper dielectric structure is greater than a relative permittivity of the lower dielectric layer.
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公开(公告)号：US12062676B2
公开(公告)日：2024-08-13
申请号：US17464655
申请日：2021-09-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun Sung Park , Jin Ho Kim , Yun Ki Lee , Bum Suk Kim , Jung-Saeng Kim , Dong Kyu Lee , Tae Sung Lee
IPC: H01L27/00 , H01L27/146 , H04N25/79
CPC classification number: H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H04N25/79
Abstract: An image sensor in which a shading phenomenon is decreased and the quality is increased is provided. The image sensor includes a light-receiving region including a plurality of unit pixels. The image sensor further includes a first region with unit pixels adjacent to a center of the light-receiving region, and a second region with the unit pixels spaced apart from the center of the light-receiving region. In both regions, a plurality of color filters corresponding to the plurality of unit pixels is disposed on a first face of the substrate, as well as a grid pattern interposed between the plurality of color filters defining boundaries between the unit pixels. A width of the grid pattern in the second region is greater than a width of the grid pattern in the first region, thereby adjusting light receiving areas near the edge of the image sensor to correct for a shading phenomenon.
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Patent Agency Ranking
公开(公告)号：US12061264B2
公开(公告)日：2024-08-13
申请号：US17722117
申请日：2022-04-15
Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Inventor： Ryoji Eki
IPC: G01S17/89 , G01C3/06 , G01S17/93 , H01L27/146 , H04N23/00 , H04N23/61 , H04N23/617 , H04N23/62 , H04N25/75 , H04N25/79 , H04N23/70
CPC classification number: G01S17/89 , G01C3/06 , G01S17/93 , H01L27/146 , H04N23/00 , H04N23/61 , H04N23/617 , H04N23/62 , H04N25/75 , H04N25/79 , H04N23/70
Abstract: The present technology relates to an imaging device and an electronic device that enable construction of an imaging device that outputs information required by a user with a small size. A single-chip imaging device includes: an imaging unit in which a plurality of pixels is arranged two-dimensionally and that captures an image; a signal processing unit that performs signal processing using a captured image output from the imaging unit; an output I/F that outputs a signal processing result of the signal processing and the captured image to an outside; and an output control unit that performs output control of selectively outputting the signal processing result of the signal processing and the captured image from the output I/F to the outside. The present technology can be applied to, for example, an imaging device that captures an image.
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公开(公告)号：US12047702B2
公开(公告)日：2024-07-23
申请号：US18002792
申请日：2021-06-24
Applicant: Beijing RuisiZhixin Technology Co., Ltd. , Alpsentek GmbH
Inventor： Yingyun Zha , Roger Mark Bostock , Jian Deng , Yu Zou
IPC: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
CPC classification number: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
Abstract: A delta image sensor comprising an arrangement of pixels and acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes a sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; a digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and a digital output circuit configured to generate an event output when the level has changed. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates corresponding to modulation of the light signal.
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公开(公告)号：US12047701B2
公开(公告)日：2024-07-23
申请号：US17995745
申请日：2021-02-24
Applicant: Sony Semiconductor Solutions Corporation
Inventor： Luonghung Asakura , Yoshiaki Inada
IPC: H04N25/77 , H04N25/616 , H04N25/65 , H04N25/78 , H04N25/79
CPC classification number: H04N25/77 , H04N25/616 , H04N25/65 , H04N25/78 , H04N25/79
Abstract: Solid-state imaging elements are disclosed. In one example, an upstream circuit sequentially generates a predetermined reset level and a signal level corresponding to an exposure amount, and causes first and second capacitive elements to hold the reset level and the signal level. A selection circuit sequentially connects one of the capacitive elements to a predetermined downstream node, disconnects both capacitive elements from the downstream node, and connects the other capacitive element to the downstream node. A downstream reset transistor initializes a level of the downstream node when both capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the signal level from the first and second capacitive elements via the downstream node and outputs the reset level and the signal level.
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公开(公告)号：US20240205562A1
公开(公告)日：2024-06-20
申请号：US18067493
申请日：2022-12-16
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Sergey VELICHKO , Manuel H. INNOCENT , Richard MAURITZSON
Abstract: An image sensor may include an array of imaging pixels arranged in rows and columns. Each imaging pixel may include a photodiode, an overflow capacitor, an overflow transistor that is interposed between the photodiode and the overflow capacitor, a floating diffusion region, a transfer transistor that is interposed between the photodiode and the floating diffusion region, a voltage supply, and a reset transistor that is interposed between the floating diffusion region and the voltage supply. The voltage supply may provide a voltage at a first magnitude that is less than the pinning voltage for a first portion of a reset period and may provide the voltage at a second magnitude that is greater than the pinning voltage for a second portion of the reset period.
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公开(公告)号：US20240204028A1
公开(公告)日：2024-06-20
申请号：US18398746
申请日：2023-12-28
Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Inventor： Takeyoshi KOMOTO , Masahiko NAKAMIZO , Toshiaki ONO , Tomonori YAMASHITA
IPC: H01L27/146 , H01L23/522 , H04N25/75 , H04N25/79
CPC classification number: H01L27/14636 , H01L23/5225 , H01L27/14634 , H01L27/14645 , H04N25/75 , H04N25/79
Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.
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