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    Semiconductor memory device having bit-line sense amplifier
    121.
    发明授权
    Semiconductor memory device having bit-line sense amplifier 失效
    具有位线读出放大器的半导体存储器件

    公开(公告)号：US07746714B2

    公开(公告)日：2010-06-29

    申请号：US12003551

    申请日：2007-12-28

    Applicant: Sang-Hee Lee

    Inventor： Sang-Hee Lee

    IPC: G11C7/00

    CPC classification number: G11C7/08 ,  G11C11/4091

    Abstract: A semiconductor memory device including a bit-line sense amplifier is not affected by variation in manufacturing process and has a stable driving scheme. The semiconductor memory device includes: a unit memory cell for storing a data; a sense amplification unit including a bit-line sense amplifier (BLSA) for sensing and amplifying a voltage difference of a bit-line pair receiving the data of the unit memory cell; a variation detection unit for detecting a variation of a manufacturing process to output a detecting signal; and a sense amplifier controlling unit for controlling the BLSA to be activated after a predetermined time from an activation of unit memory cell in response to the detecting signal.

    Abstract translation: 包括位线读出放大器的半导体存储器件不受制造工艺的变化的影响，并且具有稳定的驱动方案。 半导体存储器件包括：用于存储数据的单元存储单元; 感测放大单元，包括用于感测和放大接收单元存储单元的数据的位线对的电压差的位线读出放大器（BLSA）; 变化检测单元，用于检测制造过程的变化以输出检测信号; 以及读出放大器控制单元，用于响应于检测信号，在从单元存储器单元的激活起预定时间之后控制BLSA被激活。

    LENS DRIVING APPARATUS
    122.
    发明申请
    LENS DRIVING APPARATUS 有权
    镜头驱动装置

    公开(公告)号：US20100039719A1

    公开(公告)日：2010-02-18

    申请号：US12518976

    申请日：2007-12-12

    Applicant: Sang Ok Park ,  Sang Jun Min ,  Sang Hee Lee

    Inventor： Sang Ok Park ,  Sang Jun Min ,  Sang Hee Lee

    IPC: G02B7/02

    CPC classification number: G02B7/04 ,  E21B36/001 ,  G02B7/023 ,  G02B7/026 ,  G03B13/34 ,  H02K33/02 ,  H02K41/0356 ,  H04N5/2254

    Abstract: Disclosed is a lens driving apparatus. The lens driving apparatus includes a base formed at a center thereof with a first opening; a housing coupled with the base and having a second opening corresponding to the first opening; a yoke installed on the base and including a horizontal plate having a third opening corresponding to the first opening and a vertical plate protruding upward from the horizontal plate; a bobbin movably installed in the yoke and coupled with a lens module; a coil fixedly disposed around the bobbin; a plurality of magnets provided at the vertical plate of the yoke to face the coil; and a spring installed on at least one of upper and lower portions of the yoke to return the bobbin, which has moved up due to interaction between the magnet and the coil, to its initial position.

    Abstract translation: 公开了一种透镜驱动装置。 透镜驱动装置包括形成在其中心的基部，具有第一开口; 壳体，其与所述基座联接并具有对应于所述第一开口的第二开口; 安装在基座上的轭，包括具有与第一开口对应的第三开口的水平板和从水平板向上突出的垂直板; 可移动地安装在轭中并与透镜模块耦合的线轴; 固定地设置在所述筒管周围的线圈; 设置在所述轭的垂直板上以面对所述线圈的多个磁体; 以及安装在轭架的上部和下部中的至少一个上的弹簧，以使由于磁体和线圈之间的相互作用而向上移动的线轴返回到其初始位置。

    Over driving pulse generator
    125.
    发明授权
    Over driving pulse generator 有权
    过驱动脉冲发生器

    公开(公告)号：US07567469B2

    公开(公告)日：2009-07-28

    申请号：US11647630

    申请日：2006-12-29

    Applicant: Sang-Hee Lee

    Inventor： Sang-Hee Lee

    IPC: G11C5/14

    CPC classification number: G11C7/065 ,  G11C7/02 ,  G11C7/08 ,  G11C11/4074 ,  G11C11/4091 ,  G11C2207/065

    Abstract: A semiconductor memory device controls an over driving period according to fluctuation of a supply voltage VDD. The semiconductor memory device includes a bit line sense amplifier, a sense amplifying driver and an over driving controller. The over driving controller includes a delay unit for delaying an input signal, a supply voltage detector for detecting the level of the supply voltage VDD, a delaying controller for controlling a delay time of the delay unit in response to an output of the supply voltage detector, and an output unit for outputting a over driving pulse, whose width is controlled according to the fluctuation of the supply voltage VDD, by performing a logic operation to the input signal and an output of the delay unit.

    Abstract translation: 半导体存储器件根据电源电压VDD的波动来控制过驱动周期。 半导体存储器件包括位线读出放大器，感测放大驱动器和过驱动控制器。 过驱动控制器包括用于延迟输入信号的延迟单元，用于检测电源电压VDD的电平的电源电压检测器，用于响应于电源电压检测器的输出来控制延迟单元的延迟时间的延迟控制器 以及输出单元，通过对输入信号和延迟单元的输出执行逻辑运算，输出其宽度根据电源电压VDD的波动来控制的过驱动脉冲。

    Delay circuit and semiconductor memory device having the same
    126.
    发明申请
    Delay circuit and semiconductor memory device having the same 有权
    延迟电路和具有相同的半导体存储器件

    公开(公告)号：US20090168555A1

    公开(公告)日：2009-07-02

    申请号：US12157243

    申请日：2008-06-09

    Applicant: Sang-Hee Lee

    Inventor： Sang-Hee Lee

    IPC: G11C7/00 ,  H03H11/26

    CPC classification number: G11C7/08 ,  G11C11/4091 ,  G11C11/4094

    Abstract: A delay circuit is capable of securing a constant delay time in spite of a process variation as well as voltage and temperature variations. Using the delay circuit that secures a sensing margin time in spite of process, voltage and temperature variations, a semiconductor memory device is capable of amplifying desired data within a preset RAS to CAS delay (tRCD). The delay circuit includes a delay unit including a current source controlled by a bias voltage, a delay time of the delay unit being changed depending on current amount of the current source, and a bias voltage generating unit configured to divide a power supply voltage using a first resistor to generate the bias voltage, wherein the delay unit includes a second resistor inserted into a current path of the current source.

    Abstract translation: 尽管工艺变化以及电压和温度变化，延迟电路能够确保恒定的延迟时间。 使用延迟电路，尽管处理，电压和温度变化确保感测余量时间，半导体存储器件能够将预设RAS内的期望数据放大至CAS延迟（tRCD）。 延迟电路包括延迟单元，其包括由偏置电压控制的电流源，延迟单元的延迟时间根据电流源的电流量而改变;以及偏置电压产生单元，其被配置为使用 第一电阻器以产生偏置电压，其中所述延迟单元包括插入到所述电流源的电流路径中的第二电阻器。

    DISPLAY APPARATUS AND CONTROL METHOD THEREOF
    127.
    发明申请
    DISPLAY APPARATUS AND CONTROL METHOD THEREOF 审中-公开
    显示装置及其控制方法

    公开(公告)号：US20090150770A1

    公开(公告)日：2009-06-11

    申请号：US12183494

    申请日：2008-07-31

    Applicant: Dong-heon Lee ,  Yong-hwan Kwon ,  Sang-hee Lee ,  Won-il Kim

    Inventor： Dong-heon Lee ,  Yong-hwan Kwon ,  Sang-hee Lee ,  Won-il Kim

    IPC: G06F3/14

    CPC classification number: H04N7/163 ,  H04N5/44543 ,  H04N5/44591 ,  H04N21/4312 ,  H04N21/4314 ,  H04N21/478 ,  H04N21/482 ,  H04N21/4854 ,  H04N21/6125

    Abstract: A display apparatus which has a display unit, the display apparatus includes: a communication unit which receives contents from an external server; a UI (user interface) generator which generates UI information; and a controller which controls the UI generator to display the UI information about setting an initial screen of the contents supplied by the external server on the display unit if the display apparatus is connected to the external server.

    Abstract translation: 一种具有显示单元的显示装置，所述显示装置包括：通信单元，其从外部服务器接收内容; 生成UI信息的UI（用户界面）生成器; 以及控制器，如果所述显示装置连接到所述外部服务器，则所述控制器控制所述UI生成器以在所述显示单元上显示关于设置由所述外部服务器提供的内容的初始屏幕的UI信息。

    BROADCAST PROCESSING APPARATUS AND CONTROL METHOD THEREOF
    130.
    发明申请
    BROADCAST PROCESSING APPARATUS AND CONTROL METHOD THEREOF 审中-公开
    广播处理装置及其控制方法

    公开(公告)号：US20090019475A1

    公开(公告)日：2009-01-15

    申请号：US11950637

    申请日：2007-12-05

    Applicant: Dong-heon LEE ,  Sang-hee LEE

    Inventor： Dong-heon LEE ,  Sang-hee LEE

    IPC: H04N5/445

    CPC classification number: H04H60/27 ,  H04N21/4147 ,  H04N21/431 ,  H04N21/8455

    Abstract: A broadcast processing apparatus which has a time shift function, includes: a buffer unit which buffers a broadcast signal; a selection unit which is provided to select a broadcast signal recording function; a storage unit; a user interface (UI) generator which generates UI information; a display unit; and a controller which controls the UI generator to display the UI information on the display unit and select a recording range of the buffered broadcast signal and records the broadcast signal corresponding to the selected recording range in the storage unit if the broadcast signal recording function is selected.

    Abstract translation: 具有时移功能的广播处理装置包括：缓冲单元，缓冲广播信号; 选择单元，用于选择广播信号记录功能; 存储单元; 用于生成UI信息的用户界面（UI）生成器; 显示单元; 以及控制器，其控制UI生成器在显示单元上显示UI信息，并且如果选择了广播信号记录功能，则选择缓冲的广播信号的记录范围并将对应于所选择的记录范围的广播信号记录在存储单元中 。

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