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121.发明授权公开(公告)号：US10242638B2
公开(公告)日：2019-03-26
申请号：US15291562
申请日：2016-10-12
Inventor： Lisheng Liang , Yihjen Hsu , Lijun Xiao , Shuai Hou , Fei Shang , Xianyong Gao , Shuai Chen
IPC: G09G3/36
Abstract: A display adjusting device, a power source circuit, a display device and a display adjusting method are provided. The display adjusting device includes a start signal detection unit, configured to, in a case that a gate drive circuit including multiple stages of gate drive circuit units scans multiple rows of gate lines arranged in the display panel, detect a gate drive signal outputted by a last row of shift register unit included in each stage of gate drive circuit unit, where the gate drive signal serves as a start signal of a next stage of gate drive circuit unit adjacent to the stage of gate drive circuit unit, and a gamma main voltage setting unit, configured to set a corresponding gamma main voltage based on the start signal.
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公开(公告)号：US20190064648A1
公开(公告)日：2019-02-28
申请号：US15919340
申请日：2018-03-13
Inventor： Xiongzhou WEI , Min LI , Qiang XIONG , Jiaqi PANG , Chao LIU , Bin WAN , Hongyu SUN , Ruilin BI
Abstract: Provided is a method for manufacturing a color filter substrate including a base substrate, a black matrix layer and a plurality of color pixel units, and the color pixel unit including sub-pixel units of at least three colors. The method for manufacturing a color filter substrate includes: providing a base substrate; and forming a black matrix layer and the plurality of color pixel units on the base substrate, wherein the forming of the plurality of color pixel units includes: depositing an irreversible temperature-change material on the base substrate; and heating the irreversible temperature-change material to form sub-pixel units of at least two colors in the color pixel unit.
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公开(公告)号：US10216032B1
公开(公告)日：2019-02-26
申请号：US15922029
申请日：2018-03-15
Inventor： Xin Liu , Ni Yang , Jingyu Wang , Mengqiu Liu , Hui Li , Xuefang Chen
IPC: G02F1/1335 , G02B5/20
Abstract: The disclosure discloses a color filter substrate and a display device, where the color filter substrate includes a substrate including an active area and a peripheral area, there is such a first black matrix layer on a first surface of the substrate that has a part in the active area, there is a second black matrix layer on a second surface of the substrate facing away from the first surface; and an orthographic projection of the second black matrix layer onto the second surface, and an orthographic projection of the first black matrix layer onto the second surface, after they are overlapped with each other, covers the peripheral area of the color filter substrate; and the display device includes an array substrate, a liquid crystal layer, and the color filter substrate above.
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公开(公告)号：US10203541B2
公开(公告)日：2019-02-12
申请号：US15521905
申请日：2015-12-10
Inventor： Rui Wang , Fei Shang , Jaikwang Kim , Sijun Lei , Shaoru Li
IPC: G02F1/1335 , G02F1/1362 , H01L27/12 , G02F1/1333
Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided. The display substrate includes a display area and a non-display area surrounding the display area. The non-display area of the display substrate includes a shading pattern, to prevent light from being transmitted through the non-display area.
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公开(公告)号：US20190043897A1
公开(公告)日：2019-02-07
申请号：US16023840
申请日：2018-06-29
Inventor： Maokun TIAN , Wei SHEN , Zhonghao HUANG , Zhaojun WANG , Dalong MAO
IPC: H01L27/12
Abstract: The present disclosure describes a method for fabricating an array substrate, an array substrate, and a display device. The method includes the following steps: forming a gate electrode on a substrate; forming a gate insulating layer on a side of the gate electrode distal to the substrate; and forming an active layer and a source-drain metal sequentially on a side of the gate insulating layer distal to the gate electrode; forming a protection layer for the source-drain metal on a side of the source-drain metal distal to the gate insulating layer; and etching portion of the source-drain metal corresponding to the channel region to form a source electrode and a drain electrode.
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Patent Agency Ranking
公开(公告)号：US20190043894A1
公开(公告)日：2019-02-07
申请号：US15778038
申请日：2017-10-27
Inventor： Jae Moon CHUNG , Hongwei DU
IPC: H01L27/12 , G02F1/1362 , G02F1/1335 , G02F1/1368
CPC classification number: H01L27/1218 , G02F1/133305 , G02F1/133512 , G02F1/133514 , G02F1/136209 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136222 , G02F2201/52 , G02F2201/56 , H01L27/124
Abstract: Embodiments of the present disclosure relate to a substrate for a curved display panel, the curved display panel, and a curved display device. A substrate for a curved display panel is provided. The curved display panel includes a plurality of opening areas arranged in an array. The substrate includes a first base substrate which is curved; a strip-shaped black matrix positioned on the first base substrate and extending along a direction approximately parallel to a curved edge of the first base substrate; and a blocking portion positioned on the first base substrate. An orthographic projection of the blocking portion on the first base substrate is within an orthographic projection region of the opening area on the first base substrate.
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127.发明授权公开(公告)号：US10134353B2
公开(公告)日：2018-11-20
申请号：US15504111
申请日：2016-08-16
Inventor： Shuai Chen , Xu Lu , Lijun Xiao , Zhi Zhang , Daoping Yu , Keke Gu , Siqing Fu , Zhijian Qi , Wenlong Feng , Guanyu Zhou , Mengjie Wang
IPC: G09G3/36 , G09G3/3266 , G02F1/133 , G02F1/1362 , G02F1/1368
Abstract: The present application discloses a display panel having a plurality of gate lines and a gate driving circuit for driving the plurality of gate lines, the gate driving circuit including a plurality of first cascaded shift register units and a plurality of second cascaded shift register units for applying gate scanning signals to gate lines connected thereto. The display panel includes a first pair of first cascaded shift register unit and second cascaded shift register unit; a second pair of first cascaded shift register unit and second cascaded shift register unit; the second pair adjacent to the first pair; the first cascaded shift register unit in the first pair is electrically coupled to the second cascaded shift register unit in the second pair; and the second cascaded shift register unit in the first pair is electrically coupled to the first cascaded shift register unit in the second pair; a first group of gate lines connecting the first pair of first cascaded shift register unit and second cascaded shift register unit; and a second group of gate lines connecting the first cascaded shift register unit in the first pair and the first cascaded shift register unit in the second pair. The gate driving circuit includes a first column of cascaded shift register units and a second column of cascaded shift register units, the first column and the second column having a same number of cascaded shift register units; the first cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the first column, the second cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the second column, the first cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the second column, and the second cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the first column.
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128.发明申请公开(公告)号：US20180331126A1
公开(公告)日：2018-11-15
申请号：US15578534
申请日：2016-11-02
Inventor： Zhuo Xu , Yajie Bai , Xiaolin Wang , Rui Wang , Fei Shang , Haijun Qiu
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1225 , H01L21/707 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L27/3248 , H01L27/326 , H01L27/3262 , H01L27/3276 , H01L29/78633 , H01L29/7869
Abstract: The present a plication discloses an array substrate, a display panel a splay apparatus having the same, and a fabricating method thereof The array substrate includes a base substrate; a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode; and a thin film transistor including an active layer, an etch stop layer on a side of the active layer distal to the base substrate, a first node, and a second node.
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129.发明申请公开(公告)号：US20180308873A1
公开(公告)日：2018-10-25
申请号：US15820121
申请日：2017-11-21
Inventor： Xiaoyuan WANG , Ni YANG , Yan FANG , Zhijian QI , Shaoru LI
IPC: H01L27/12 , H01L29/417
CPC classification number: H01L27/1255 , H01L27/1259 , H01L29/41733
Abstract: A thin film transistor comprises a gate, a gate insulating layer, an active layer, a source electrode and a drain electrode. The drain electrode comprises a first sub-drain electrode and at least one second sub-drain electrode. A first portion of the active layer between the first sub-drain electrode and the source electrode and a second portion of the active layer between each of the at least one second sub-drain electrode and the source electrode are used for forming different portions of a primary channel, respectively. The first sub-drain electrode is a signal input electrode, and a third portion of the active layer between the first sub-drain electrode and each of the at least one second sub-drain electrode is used for forming an auxiliary channel. A channel length of the auxiliary channel is less than or equal to a channel length of the primary channel.
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公开(公告)号：US20180254289A1
公开(公告)日：2018-09-06
申请号：US15791107
申请日：2017-10-23
Inventor： Zhonghao HUANG , Yongliang ZHAO , Houfeng ZHOU , Zhiyong NING , Hongru ZHOU
IPC: H01L27/12 , H01L21/027 , H01L21/3065 , H01L21/02 , H01L21/3213
CPC classification number: H01L27/127 , H01L21/02068 , H01L21/0274 , H01L21/3065 , H01L21/32134
Abstract: A patterning method employing a half tone mask includes the steps of: successively forming a first thin film layer, a second thin film layer and a photoresist thin film layer on a substrate; exposing and developing the photoresist thin film layer by using a half tone mask plate; performing a first etching on the substrate that is exposed and developed; performing a second etching on the substrate that has been subject to the first etching; passivating the substrate that has been subject to the first etching; ashing the substrate that has been passivated; performing a third etching on the substrate that has been subject to the ashing and the second etching; and, stripping the substrate that has been subject to the third etching.
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