Frequency calibration for a monolithic clock generator and timing/frequency reference
    91.
    发明授权
    Frequency calibration for a monolithic clock generator and timing/frequency reference 有权
    单片时钟发生器的频率校准和定时/频率参考

    公开(公告)号:US07548125B2

    公开(公告)日:2009-06-16

    申请号:US11805427

    申请日:2007-05-23

    CPC classification number: H03L1/00 G01R23/15 H03L1/022 H03L7/099

    Abstract: Exemplary embodiments of the invention provide a system, method and apparatus for frequency calibration of a free-running, reference harmonic oscillator. An exemplary system comprises the harmonic oscillator, a frequency divider, a comparator, and a reactance modulator. The reference harmonic oscillator includes a plurality of switchable reactance modules controlled by corresponding coefficients, and provides an oscillation signal having an oscillation frequency, which is divided or multiplied by the frequency divider to provide an output signal having an output frequency. The comparator compares the output frequency to an externally supplied reference frequency using first and second predetermined levels of discrimination, and provides first or second comparison signals when the output frequency is higher or lower than the reference frequency. The reactance modulator determines a plurality of coefficients to control switching of the plurality of switchable reactance modules to increase or decrease a reactance of the oscillator in response to the first and second comparison signals.

    Abstract translation: 本发明的示例性实施例提供了一种用于自由运行的参考谐波振荡器的频率校准的系统,方法和装置。 示例性系统包括谐波振荡器,分频器,比较器和电抗调制器。 参考谐波振荡器包括由相应系数控制的多个可切换电抗模块,并且提供具有振荡频率的振荡信号,该振荡信号被分频器分频或乘以分频器以提供具有输出频率的输出信号。 比较器使用第一和第二预定等级的鉴别比较输出频率与外部提供的参考频率,并且当输出频率高于或低于参考频率时提供第一或第二比较信号。 电抗调制器确定多个系数以控制多个可切换电抗模块的切换,以响应于第一和第二比较信号增加或减小振荡器的电抗。

    CLOCK CALIBRATION IN SLEEP MODE
    92.
    发明申请
    CLOCK CALIBRATION IN SLEEP MODE 有权
    休眠模式下的时钟校准

    公开(公告)号:US20090147899A1

    公开(公告)日:2009-06-11

    申请号:US12269126

    申请日:2008-11-12

    CPC classification number: H03L7/00 H03L1/00 H04W52/029 Y02D70/1242

    Abstract: In one embodiment, an improvement is described for synchronization between devices in, e.g., a wireless network, wherein at least one device includes both a slow clock and a fast clock for different modes of operation. The fast clock for an active mode of operation is calibrated after a sleep mode of operation during which the slow clock is employed for device timing. Calibration employs a filter-based technique. Counts for the slow clock and for the fast clock are measured over a first interval, and the number of slow-clock counts is measured over a second interval. An estimate for the number of fast counts over the second interval is generated, filtered to reduce noise and error effects, and then employed to update the fast clock in the active mode of operation.

    Abstract translation: 在一个实施例中,描述了在例如无线网络中的设备之间的同步的改进,其中至少一个设备包括用于不同操作模式的慢时钟和快时钟。 主动操作模式的快速时钟在休眠模式下进行校准,在该模式下,采用慢时钟进行器件定时。 校准采用基于滤波器的技术。 在第一个间隔测量慢时钟和快时钟的计数,并在第二个时间间隔内测量慢时钟计数。 产生第二个间隔内快速计数的估计值,进行滤波以减少噪声和误差影响,然后用于更新主动运行模式下的快速时钟。

    Control Voltage Generator for a Clock, Frequency Reference, and Other Reference Signal Generator
    93.
    发明申请
    Control Voltage Generator for a Clock, Frequency Reference, and Other Reference Signal Generator 有权
    用于时钟,频率参考和其他参考信号发生器的控制电压发生器

    公开(公告)号:US20090146719A1

    公开(公告)日:2009-06-11

    申请号:US12013438

    申请日:2008-01-12

    CPC classification number: H03K3/011 H03B5/04 H03L1/00 H03L1/026 H03L5/00 H03L7/00

    Abstract: Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, a control voltage generator adapted to provide a temperature-dependent control voltage; and a plurality of variable reactance modules. The reference resonator generates a first reference signal having a resonant frequency, and each reactance module is adapted to modify a corresponding reactance in response to the control voltage to maintain the resonant frequency substantially constant or within a predetermined variance over a predetermined temperature range. A frequency controller may also be included to maintain substantially constant a magnitude of a peak amplitude of the first reference signal and maintains substantially constant a common mode voltage level of the reference resonator.

    Abstract translation: 本发明的示例性实施例提供了一种参考信号发生器,系统和方法。 产生谐波参考信号的示例性装置包括参考谐振器,例如LC槽,适于提供温度依赖控制电压的控制电压发生器; 以及多个可变电抗模块。 参考谐振器产生具有谐振频率的第一参考信号,并且每个电抗模块适于响应于控制电压修改相应的电抗,以使谐振频率基本上恒定或在预定的温度范围内的预定方差内。 还可以包括频率控制器以保持第一参考信号的峰值幅度的幅度基本上恒定,并且保持参考谐振器的共模电压电平基本恒定。

    Digital Controlled Oscillator
    94.
    发明申请
    Digital Controlled Oscillator 有权
    数字控制振荡器

    公开(公告)号:US20090045880A1

    公开(公告)日:2009-02-19

    申请号:US12176514

    申请日:2008-07-21

    CPC classification number: H03K3/0231 H03K3/011 H03L1/00 H03L7/02

    Abstract: A digital controlled oscillator including a programmable current source, a first variable capacitor and a second variable capacitor. A comparator compares the voltage across the variable capacitors with a reference voltage level and generates a DCO output clock signal. A switching means alternately switches the variable capacitors to either charge from a programmable current source or discharge in response to an output signal of the comparator. A clock divider divides the DCO output clock signal by a factor N substantially greater than 1. A frequency monitor receives the divided clock signal, determines the time difference of successive clock periods of the divided clock signal and generates a feedback signal to adapt the frequency of the DCO output clock signal.

    Abstract translation: 一种数字控制振荡器,包括可编程电流源,第一可变电容器和第二可变电容器。 比较器将可变电容器两端的电压与参考电压电平进行比较,并产生DCO输出时钟信号。 切换装置响应于比较器的输出信号交替地切换可变电容器以从可编程电流源充电或放电。 时钟分频器将DCO输出时钟信号除以基本大于1的因子N.频率监视器接收分频时钟信号,确定分频时钟信号的连续时钟周期的时间差,并产生反馈信号以使频率 DCO输出时钟信号。

    Feedback circuit for minimizing VCO sensitivity
    95.
    发明授权
    Feedback circuit for minimizing VCO sensitivity 有权
    用于最小化VCO灵敏度的反馈电路

    公开(公告)号:US07342461B1

    公开(公告)日:2008-03-11

    申请号:US11361290

    申请日:2006-02-23

    Applicant: John Wood

    Inventor: John Wood

    CPC classification number: H03L1/00

    Abstract: System and method for adjusting supply voltage to VCO to minimize affects of circuit noise on VCO. Method includes obtaining a number of data points each by incrementing a counter by the number of VCO periods during a phase of a local oscillator, changing the supply voltage, decrementing the counter by the number of VCO periods during another phase of the local oscillator, and then storing the net count. Then among the saved data points a data point is selected that is the point at or near where the VCO is least sensitive to supply changes and the VCO is set to operate at the supply voltage corresponding to this data point. A system includes a controller, up/down counter, local oscillator, and VCO. The counter counts the oscillations of the VCO and a stored net counts provide information as to where the VCO is least sensitive to the supply voltage.

    Abstract translation: 用于调节VCO电源电压的系统和方法,以最小化VCO上电路噪声的影响。 方法包括通过在本地振荡器的相位期间增加计数器的VCO周期的数量来获得多个数据点,改变电源电压,在本地振荡器的另一阶段期间使计数器减少VCO周期的数量,以及 然后存储净数。 然后在保存的数据点中,选择一个数据点,该数据点是VCO对电源变化最不敏感的点附近,并且VCO被设置为在与该数据点相对应的电源电压下工作。 一个系统包括一个控制器,上/下计数器,本地振荡器和VCO。 计数器对VCO的振荡进行计数,并且存储的净计数提供关于VCO对电源电压最不敏感的信息。

    Method and system for automatically calibrating a clock oscillator in a base station
    97.
    发明申请
    Method and system for automatically calibrating a clock oscillator in a base station 审中-公开
    用于自动校准基站中的时钟振荡器的方法和系统

    公开(公告)号:US20070189428A1

    公开(公告)日:2007-08-16

    申请号:US11353702

    申请日:2006-02-14

    CPC classification number: H04J3/0688 H03L1/00 H03L7/00 H04L7/0004

    Abstract: Method and system for automatically calibrating a clock oscillator (202) in a base station (102) are provided. The method (300) includes receiving (304) a span of at least one transmission link and linking (306) the base station to at least one reference clock over the at least one transmission link. Further, the method includes receiving (308) a reference signal from the at least one reference clock through the at least one transmission link. The method also includes synchronizing (310) the clock oscillator with the reference signal within a calibration period of a specified duration.

    Abstract translation: 提供了用于自动校准基站(102)中的时钟振荡器(202)的方法和系统。 所述方法(300)包括接收(304)至少一个传输链路的跨度,并且通过所述至少一个传输链路将所述基站链接(306)至少一个参考时钟。 此外,该方法包括通过至少一个传输链路从至少一个参考时钟接收(308)参考信号。 该方法还包括在指定持续时间的校准周期内使时钟振荡器与参考信号同步(310)。

    Frequency calibration for a monolithic clock generator and timing/frequency reference
    98.
    发明授权
    Frequency calibration for a monolithic clock generator and timing/frequency reference 有权
    单片时钟发生器的频率校准和定时/频率参考

    公开(公告)号:US07248124B2

    公开(公告)日:2007-07-24

    申请号:US11232409

    申请日:2005-09-20

    Abstract: Exemplary embodiments of the invention provide a system, method and apparatus for frequency calibration of a free-running, harmonic oscillator. A reference oscillator provides a reference frequency. An exemplary system comprises the harmonic oscillator, a frequency divider, a comparator, and a reactance modulator. The oscillator comprises a plurality of switchable reactance modules and a coefficient register, and provides an oscillation signal having an oscillation frequency. The frequency divider provides an output frequency as a fraction of the oscillation frequency. The comparator compares the output and reference frequencies and provides a comparison signal when the output frequency is not substantially equal to the reference frequency. The reactance modulator determines and provides to the coefficient register a first plurality of coefficients to control switching of a first subset of the reactance modules to increase the reactance of the oscillator when the output frequency is greater than the reference frequency, and a second plurality of coefficients to control switching of a second subset of the reactance modules to decrease the reactance of the oscillator when the output frequency is less than the reference frequency.

    Abstract translation: 本发明的示例性实施例提供了一种用于自由运行的谐波振荡器的频率校准的系统,方法和装置。 参考振荡器提供参考频率。 示例性系统包括谐波振荡器,分频器,比较器和电抗调制器。 振荡器包括多个可切换电抗模块和系数寄存器,并提供具有振荡频率的振荡信号。 分频器将输出频率提供为振荡频率的一部分。 比较器比较输出和参考频率,并在输出频率基本上不等于参考频率时提供比较信号。 电抗调制器确定并向系数寄存器提供第一多个系数以控制电抗模块的第一子集的切换,以在输出频率大于参考频率时提高振荡器的电抗,并且第二多个系数 以当输出频率小于参考频率时,控制电抗模块的第二子集的切换以减小振荡器的电抗。

    A method for steering an oscillator and an oscillator
    100.
    发明申请
    A method for steering an oscillator and an oscillator 审中-公开
    一种用于控制振荡器和振荡器的方法

    公开(公告)号:US20070085616A1

    公开(公告)日:2007-04-19

    申请号:US10570342

    申请日:2003-09-05

    Applicant: Sampo Aallos

    Inventor: Sampo Aallos

    CPC classification number: H03B19/00 H03L1/00 H03L1/028 H03L7/16

    Abstract: A method to control a frequency oscillator, as a crystal oscillator, and to form an oscillating circuit in order to produce a frequency oscillator improved to its qualities, in which the frequency of reference oscillator (1) is changed by means of frequency multiplier (2) into output frequency. As frequency oscillator a low frequency oscillator (1) is used, the control of which output frequency (5) is carried out adjusting the low frequency oscillator (1) by means of control arrangement (4).

    Abstract translation: 一种控制频率振荡器作为晶体振荡器并形成振荡电路以便产生频率振荡器的方法,该频率振荡器的质量得到改善,其中参考振荡器(1)的频率通过倍频器(2 )转换成输出频率。 作为频率振荡器,使用低频振荡器(1),通过控制装置(4)对通过调制低频振荡器(1)的输出频率(5)进行控制。

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