公开(公告)号：US6165652A

公开(公告)日：2000-12-26

申请号：US461332

申请日：1999-12-15

Applicant: Soichi Inoue ,  Iwao Higashikawa ,  Yoji Ogawa ,  Shigehiro Hara ,  Kazuko Yamamoto

Inventor： Soichi Inoue ,  Iwao Higashikawa ,  Yoji Ogawa ,  Shigehiro Hara ,  Kazuko Yamamoto

IPC: H01L21/027 ,  G03F7/20 ,  G03F9/00

CPC classification number: G03F7/70425

Abstract: A method of forming a photomask of a semiconductor device comprising the steps of forming a photosensitive film on a substrate and exposing the photosensitive film on the substrate by radiating with a radiation beam a plurality of butting unit regions defining butting portions between the butting unit regions and controlling said radiating of the butting unit region so that the butting portions of the butting unit regions are formed only in portions corresponding to isolation regions or alternatively, they are not formed in portions corresponding to contact areas.

Abstract translation: 一种形成半导体器件的光掩模的方法，包括以下步骤：在衬底上形成感光膜，并通过用辐射束辐射将感光膜暴露在衬底上，多个对接单元区域限定对接单元区域和对接单元区域之间的对接部分 控制对接单元区域的辐射，使得对接单元区域的对接部分仅形成在对应于隔离区域的部分中，或者替代地，它们不形成在对应于接触区域的部分中。

公开(公告)号：US06110647A

公开(公告)日：2000-08-29

申请号：US024225

申请日：1998-02-17

Applicant: Soichi Inoue ,  Hisashi Kaneko ,  Masahiko Hasunuma ,  Takamasa Usui ,  Masami Aoki ,  Kazuko Yamamoto ,  Sachiko Kobayashi

Inventor： Soichi Inoue ,  Hisashi Kaneko ,  Masahiko Hasunuma ,  Takamasa Usui ,  Masami Aoki ,  Kazuko Yamamoto ,  Sachiko Kobayashi

IPC: G03F9/00 ,  G03F1/36 ,  G03F1/68 ,  G03F7/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/768 ,  H01L21/82 ,  H01L21/822 ,  H01L27/04

CPC classification number: G03F7/70425 ,  G03F1/36 ,  G03F7/0035

Abstract: A method of manufacturing a semiconductor device, comprises the steps of forming a first transfer pattern corresponding to a mask pattern on a major surface side of a semiconductor substrate through a first mask plate on which the first mask pattern having a straight portion and a bent portion is formed, and forming a second transfer pattern corresponding to a second mask pattern on a major surface side of the semiconductor substrate through a second mask plate on which the second mask pattern having a pattern arranged at a position corresponding to the straight portion is formed.

Abstract translation: 一种制造半导体器件的方法，包括以下步骤：通过第一掩模板在半导体衬底的主表面侧上形成与掩模图案对应的第一转印图案，其中第一掩模图案具有直的部分和弯曲部分 并且通过第二掩模板在半导体衬底的主表面侧上形成与第二掩模图案相对应的第二传输图案，在第二掩模板上形成布置在对应于直线部分的位置处的图案的第二掩模图案。

公开(公告)号：US5889686A

公开(公告)日：1999-03-30

申请号：US837890

申请日：1997-04-22

Applicant: Shoji Mimotogi ,  Soichi Inoue

Inventor： Shoji Mimotogi ,  Soichi Inoue

IPC: H01L21/027 ,  G03F7/26 ,  G06F17/50 ,  H01L21/00

CPC classification number: G06F17/5018

Abstract: A profile of a developed resist is exactly simulated irrespective of whether or not a resist pattern is dense. A dissolution rate of a film to be processed, which film is provided on a substrate, is varied in accordance with a concentration of a developer and the profile of the developed resist is simulated with use of the varied dissolution rate. In addition, a spatial average of an optical image of a resist, which is averaged in the thickness direction of the resist, is calculated and the dissolution rate of the resist is modulated by using the calculated spatial average. The profile of the resist is simulated by using the modulated dissolution rate. Therefore, the profile of the resist on the substrate, which profile varies when the resist is exposed in a desired pattern and developed, can be exactly estimated.

Abstract translation: 无论抗蚀剂图案是否密集，都精确地模拟了显影抗蚀剂的轮廓。 根据显影剂的浓度改变待处理的膜的膜，该膜被提供在基板上，并且使用变化的溶解速率来模拟显影抗蚀剂的轮廓。 另外，计算抗蚀剂的厚度方向平均的抗蚀剂的光学图像的空间平均，并且通过使用计算的空间平均值来调制抗蚀剂的溶解速率。 通过使用调制的溶解速率来模拟抗蚀剂的轮廓。 因此，可以精确地估计当抗蚀剂以期望的图案曝光并显影时，轮廓变化的基板上的抗蚀剂的轮廓。

公开(公告)号：US5876885A

公开(公告)日：1999-03-02

申请号：US686703

申请日：1996-07-25

Applicant: Shoji Mimotogi ,  Soichi Inoue ,  Akiko Mimotogi

Inventor： Shoji Mimotogi ,  Soichi Inoue ,  Akiko Mimotogi

IPC: G01B21/20 ,  C23F1/00 ,  G03F1/36 ,  G03F1/68 ,  G03F7/20 ,  H01L21/027 ,  G03F9/00

CPC classification number: G03F7/705

Abstract: The profile simulation method of predicting a processed profile of a surface of a substrate to be changed by physically or chemically processing a film on the substrate to be processed comprises a step of changing a processing speed in correspondence with a convex portion and a recessed portion of the film on the substrate.

Abstract translation: 通过物理或化学处理要处理的基板上的膜来改变要改变的基板的表面的处理轮廓的轮廓模拟方法包括以下步骤：将处理速度与凸部和凹部对应地改变 底片上的薄膜。

公开(公告)号：US5549995A

公开(公告)日：1996-08-27

申请号：US402656

申请日：1995-03-13

Applicant: Satoshi Tanaka ,  Soichi Inoue ,  Hiroko Nakamura

Inventor： Satoshi Tanaka ,  Soichi Inoue ,  Hiroko Nakamura

IPC: G03F1/30 ,  G03F1/68 ,  H01L21/027 ,  G03F9/00

CPC classification number: G03F1/30

Abstract: A transmitting photomask includes an optically transparent substrate having a major surface on which a plurality of recesses are selectively formed and transmitting exposure light, a plurality of opaque materials formed on the portions of the major surface of the transparent substrate, other than the recesses and preventing the exposure light from passing therethrough, and a plurality of transmitting portions constituted of the recesses. Each of the recesses has side walls formed perpendicular to the major surface of the transparent substrate so as to substantially coincide with a corresponding end face of each of the opaque materials, and adjacent transmitting portions have different depths. A method of manufacturing a transmitting photomask, includes a step of forming an opaque film preventing exposure light from passing therethrough on an optically transparent substrate transmitting the exposure light, a step of forming a plurality of opening patterns for forming a transmitting portion on the opaque film and thus forming a plurality of opaque materials with remaining portions of the opaque film, and a step of forming a plurality of transmitting portions including recesses having different depths alternately by etching the transparent substrate through the opening patterns by use of anisotropic etching.

Abstract translation: 发送光掩模包括具有主表面的光学透明基板，多个凹部被选择性地形成在其上并透射曝光光，多个不透明材料形成在透明基板的主表面的除了凹部之外的部分上，并防止 来自其的曝光光，以及由凹部构成的多个透光部。 每个凹部具有垂直于透明基板的主表面形成的侧壁，以便与每个不透明材料的相应端面基本上重合，并且相邻的透光部分具有不同的深度。 一种发送光掩模的制造方法，其特征在于，包括以下步骤：在透光曝光用光学透明基板上形成防止曝光的透光的不透明膜，在不透明膜上形成多个用于形成透光部的开口图案的工序 并且由此形成多个不透明材料，其余部分是不透明膜，以及通过使用各向异性蚀刻通过开口图案蚀刻透明基板而交替地形成包括具有不同深度的凹槽的多个透光部分的步骤。

公开(公告)号：US5514499A

公开(公告)日：1996-05-07

申请号：US249038

申请日：1994-05-25

Applicant: Takayuki Iwamatsu ,  Kenji Kawano ,  Hideya Miyazaki ,  Shinichi Ito ,  Soichi Inoue ,  Hiroyuki Sato ,  Satoshi Tanaka ,  Koji Hashimoto

Inventor： Takayuki Iwamatsu ,  Kenji Kawano ,  Hideya Miyazaki ,  Shinichi Ito ,  Soichi Inoue ,  Hiroyuki Sato ,  Satoshi Tanaka ,  Koji Hashimoto

IPC: G03F1/00 ,  G03F1/26 ,  G03F1/32 ,  G03F1/34 ,  G03F9/00

CPC classification number: G03F1/34 ,  G03F1/26 ,  G03F1/32

Abstract: A reflection phase shifting mask used to expose a pattern by forming reflected light having a phase difference upon reflection of light, includes a substrate for reflecting exposure light, a phase shifting layer formed on a portion on the substrate, and a light transmitting medium formed on the substrate and the phase shifting layer, wherein the thickness of the phase shifting layer is set such that the phase difference between light reflected by the substrate and light reflected by the phase shifting layer becomes 180.degree..

Abstract translation: 用于通过在光反射时形成具有相位差的反射光来曝光图案的反射相移掩模包括反射曝光光的基板，形成在基板上的部分上的相移层和形成在基板上的光传输介质 基板和相移层，其中相移层的厚度被设定为使得由基板反射的光与由相移层反射的光之间的相位差成为180度。

公开(公告)号：US08885949B2

公开(公告)日：2014-11-11

申请号：US13238383

申请日：2011-09-21

Applicant: Shigeki Nojima ,  Tetsuaki Matsunawa ,  Soichi Inoue

Inventor： Shigeki Nojima ,  Tetsuaki Matsunawa ,  Soichi Inoue

IPC: G06K9/46 ,  G03F7/00 ,  G01N21/00 ,  G06K9/00

CPC classification number: G06K9/00 ,  G01N21/00 ,  G03F1/36 ,  G03F7/00 ,  G03F7/70441 ,  G03F7/70516

Abstract: According to the pattern shape determining method of the embodiment, a first reference position of a pattern shape is set on a first pattern and a second reference position of a pattern shape is set on a second pattern. Moreover, an allowable dimensional difference between the first pattern and the second pattern is set to a value corresponding to a distance from the first reference position. Then, it is determined whether the second pattern has a pattern shape identical with the first pattern, based on whether a dimensional difference between the first pattern and the second pattern is within a range of an allowable dimensional difference set at a position at which the dimensional difference is calculated.

Abstract translation: 根据本实施例的图案形状确定方法，将图案形状的第一参考位置设置在第一图案上，并且将图案形状的第二参考位置设置在第二图案上。 此外，将第一图案和第二图案之间的容许尺寸差设定为与从第一基准位置的距离对应的值。 然后，基于第一图案和第二图案之间的尺寸差是否在设定在尺寸的位置的容许尺寸差的范围内，确定第二图案是否具有与第一图案相同的图案形状 差额计算。

公开(公告)号：US08163611B2

公开(公告)日：2012-04-24

申请号：US11643907

申请日：2006-12-22

Applicant: Koji Hashimoto ,  Soichi Inoue ,  Kazuhiro Takahata ,  Kei Yoshikawa

Inventor： Koji Hashimoto ,  Soichi Inoue ,  Kazuhiro Takahata ,  Kei Yoshikawa

IPC: H01L21/8249

CPC classification number: G03F7/0035 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/32139 ,  H01L21/823456 ,  H01L21/823475 ,  H01L27/10873 ,  H01L27/10894 ,  H01L27/10897

Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.

Abstract translation: 在工作薄膜（3）上的硬掩模材料膜（4）上的曝光分辨率的限制的尺寸形成抗蚀剂图案（5）。 使用抗蚀剂图案（5）作为掩模来处理材料膜（4）。 由此形成硬掩模图案（6）。 由此，形成具有开口（7a）的非选择区域（6b）上的抗蚀剂图案（7），掩模图案中的选择区域（6a）通过该开口露出。 通过进行选择蚀刻，只有通过开口（7a）露出的掩模图案（6a）变薄，通过使用掩模图案（6）蚀刻工作膜（3）。 由此形成工作胶片图案（8），其包括具有限制曝光分辨率的尺寸宽度的宽图案部分（8a）和尺寸不超过限制的尺寸的纤薄图案部分（8a） 曝光分辨率。

公开(公告)号：US08142961B2

公开(公告)日：2012-03-27

申请号：US12717914

申请日：2010-03-04

Applicant: Toshiya Kotani ,  Satoshi Tanaka ,  Shigeki Nojima ,  Koji Hashimoto ,  Soichi Inoue

Inventor： Toshiya Kotani ,  Satoshi Tanaka ,  Shigeki Nojima ,  Koji Hashimoto ,  Soichi Inoue

IPC: G03F1/00

CPC classification number: G06F17/5068 ,  G03F1/36

Abstract: A pattern correcting method for correcting a design pattern to form a desired pattern on a wafer is disclosed, which comprises defining an allowable dimensional change quantity of each of design patterns, defining a pattern correction condition for the each design pattern based on the allowable dimensional change quantity defined for the each design pattern, and correcting the each design pattern based on the pattern correction condition defined for the each design pattern.

Abstract translation: 公开了一种用于校正在晶片上形成期望图案的设计图案的图案校正方法，其包括限定每个设计图案的允许尺寸变化量，基于允许的尺寸变化来定义每个设计图案的图案校正条件 并且基于为每个设计图案定义的图案校正条件来校正每个设计图案。

公开(公告)号：USRE42302E1

公开(公告)日：2011-04-19

申请号：US11905862

申请日：2007-10-04

Applicant: Toshiya Kotani ,  Satoshi Tanaka ,  Soichi Inoue

Inventor： Toshiya Kotani ,  Satoshi Tanaka ,  Soichi Inoue

IPC: G06F17/50 ,  G06F9/455 ,  G06F11/22

CPC classification number: G06F17/5081

Abstract: A method for designing a semiconductor integrated circuit is provided which comprises compacting a design layout of a semiconductor integrated circuit on the basis of a given design rule to obtain a compacted pattern, predicting a pattern to be formed at a surface area of a wafer for forming the semiconductor integrated circuit on the basis of the compacted pattern, obtaining an evaluated value by comparing the predicted pattern with the compacted pattern, deciding whether the evaluated value satisfies a predetermined condition, and modifying the design rule when the evaluated value is decided as not satisfying the predetermined condition.

Abstract translation: 提供了一种用于设计半导体集成电路的方法，其包括基于给定的设计规则压缩半导体集成电路的设计布局以获得压缩图案，预测在用于形成的晶片的表面区域形成的图案 所述半导体集成电路基于所述压实图案，通过将所述预测图案与所述压实图案进行比较来获得评价值，判定所述评价值是否满足预定条件，以及当所述评价值被判定为不满足时修改所述设计规则 预定条件。