Payload size ambiguity and false alarm rate reduction for polar codes

    公开(公告)号:US10686469B2

    公开(公告)日:2020-06-16

    申请号:US15953239

    申请日:2018-04-13

    Abstract: Size ambiguity and false alarm rate reduction for polar codes. A user equipment (UE) may determine a decoding candidate bit sequence for a polar-encoded codeword having a codeword size based on a decoding hypothesis for control information having a particular bit length of multiple different bit lengths for the codeword size. The UE may calculate an error detection code (EDC) value for a payload portion of the decoding candidate bit sequence using an EDC algorithm, and may initialize an EDC variable state with at least one non-zero bit value. Scrambling or interleaving of bits may also be performed prior to, or after, polar encoding and may depend on the bit length. In examples, information bits may be bit-reversed prior to generating an EDC value. In examples, the encoded bits may include multiple EDC values to assist the UE in performing early termination and to reduce a false alarm rate.

    Low latency bit-reversed polar codes

    公开(公告)号:US10476525B2

    公开(公告)日:2019-11-12

    申请号:US15704204

    申请日:2017-09-14

    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may determine indices associated with m consecutive elements. In an aspect, each of the m consecutive elements may be associated with a different index. In addition, the apparatus may bit reverse a binary sequence associated with each of the m consecutive elements. In an aspect, each of the m consecutive elements may include a different binary sequence. Further, the apparatus may determine a bit-reversed order of the indices based at least in part on the bit-reversed binary sequence associated with each of the m elements. In addition, the apparatus may write each of the m consecutive elements to a different memory bank in parallel based at least in part on the bit-reversed order of the indices.

    ENHANCED LVA DECODING USING ITERATIVE COMPARISON TRELLIS CONSTRUCTION

    公开(公告)号:US20170359146A1

    公开(公告)日:2017-12-14

    申请号:US15592519

    申请日:2017-05-11

    CPC classification number: H04L1/0054 H03M13/4115 H04L1/005

    Abstract: The described techniques relate to improved methods, systems, devices, or apparatuses that support enhanced efficiency in list Viterbi algorithm (LVA) decoding using iterative comparison trellis construction. Iterative comparison may involve comparison and selection from ordered accumulated path metrics associated with feeding transitions by selecting, for each successive rank of an ordered path metrics list for the current stage, the best unselected accumulated path metric of the feeding transitions. The iterative comparison may be performed sequentially for each stage before processing the next stage. Alternatively, the iterative comparison may be pipelined across stages, and different ranks of the ordered path metrics lists for different stages may be concurrently computed in a single trellis search cycle using multiple comparators. Iterative comparison may be used in an inner decoder to generate an ordered path metrics list for processing according to an error checking function using an outer decoder.

    SYSTEM AND METHODS FOR DYNAMICALLY MANAGING RECEIVE MODES TO IMPROVE PERFORMANCE ON A MULTI-SUBSCRIBER IDENTITY (SIM) WIRELESS COMMUNICATION DEVICE
    97.
    发明申请
    SYSTEM AND METHODS FOR DYNAMICALLY MANAGING RECEIVE MODES TO IMPROVE PERFORMANCE ON A MULTI-SUBSCRIBER IDENTITY (SIM) WIRELESS COMMUNICATION DEVICE 审中-公开
    用于动态管理接收模式以提高多用户识别(SIM)无线通信设备性能的系统和方法

    公开(公告)号:US20160134317A1

    公开(公告)日:2016-05-12

    申请号:US14673851

    申请日:2015-03-30

    CPC classification number: H04B1/3816 H04W8/183 H04W60/005 H04W68/02

    Abstract: Methods and devices for implementing dynamic receive mode management to improve data throughput and paging performance on a multi-subscriber identification module (SIM) wireless communication device may include detecting, on a protocol stack associated with a first SIM, an active communication in a first network, detecting, on a protocol stack associated with a second SIM, an idle mode paging cycle in a second network, prompting entry into a selected dual receive mode on the shared RF resource, and monitoring at least one performance metric for the idle mode paging cycle associated with the second SIM while in the dual receive mode. Based on the monitored performance metric while in the dual receive mode, the wireless communication device may determine whether paging performance is degraded for the second SIM, and if so, trigger entry into a fallback mode on the shared RF resource.

    Abstract translation: 用于实现动态接收模式管理以改善多用户识别模块(SIM)无线通信设备上的数据吞吐量和寻呼性能的方法和设备可以包括在与第一SIM相关联的协议栈上检测第一网络中的活动通信 在与第二SIM卡相关联的协议栈上检测第二网络中的空闲模式寻呼周期,提示在所述共享RF资源上进入所选择的双重接收模式,以及监视所述空闲模式寻呼周期的至少一个性能度量 在双重接收模式下与第二SIM卡相关联。 基于双重接收模式下的监视性能度量,无线通信设备可以确定第二SIM卡的寻呼性能是否下降,如果是,则在共享RF资源上触发进入回退模式。

    Unlicensed band channel access procedures for reduced user equipment (UE) complexity

    公开(公告)号:US12279307B2

    公开(公告)日:2025-04-15

    申请号:US17939516

    申请日:2022-09-07

    Abstract: Aspects of the present disclosure include methods, apparatuses, and computer-readable medium for transmitting a capability signal to a network entity, wherein the capability signal indicates whether the UE is capable of supporting an uplink (UL) bandwidth that is equal to or less than a downlink (DL) bandwidth for communication over an unlicensed band; and exchanging a signal between the UE and the network entity over the unlicensed band according to the capability signal. Some alternative or additional aspects include methods, apparatuses, and computer-readable medium for receiving a signal from a network entity, wherein the signal indicates that short control signal exemption (SCSt) is applied to a synchronization signal block (SSB) transmission of one or more network entities over an unlicensed band; and skipping SSB presence detection of the one or more network entities in response to the signal.

    Erasure style LDPC rate matching for TB over multiple slots

    公开(公告)号:US12166581B2

    公开(公告)日:2024-12-10

    申请号:US17664630

    申请日:2022-05-23

    Abstract: Methods, apparatuses, and computer-readable storage medium for rate matching for TBoMS are provided. An example method includes calculating a slot length for each UL slot of a plurality of UL slots, the slot length for each UL slot being associated with a plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single TB or a single rate matching. The example method may include allocating one or more bits of the plurality of rate matching output bits for a modulation process. The example method may include refraining allocating at least one bit of the plurality of rate matching output bits for the modulation process, the at least one bit corresponding to UCI multiplexing.

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