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公开(公告)号:US10375395B2
公开(公告)日:2019-08-06
申请号:US15439964
申请日:2017-02-23
Applicant: MEDIATEK INC.
Inventor: Sheng-Jen Wang , Yung-Chang Chang , Chia-Yun Cheng
Abstract: A video processing apparatus includes an external storage device, a hardware entropy engine, and a software execution engine. The hardware entropy engine performs entropy processing of a current picture, and further outputs count information to the external storage device during the entropy processing of the current picture. When loaded and executed by the software execution engine, a software program instructs the software execution engine to convert the count information into count table contents, and generate a count table in the external storage device according to at least the count table contents. The count table is referenced to apply a backward adaptation to a probability table that is selectively used by the hardware entropy engine to perform entropy processing of a next picture.
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92.
公开(公告)号:US10366467B1
公开(公告)日:2019-07-30
申请号:US15678118
申请日:2017-08-16
Applicant: MEDIATEK INC.
Inventor: Tsu-Ming Liu , Ping Chao , Yung-Chang Chang
Abstract: A method for storing data of an image frame into a frame buffer includes at least the following steps: dividing the image frame into a plurality of access units, each having at least one encoding unit, wherein each encoding unit is a unit for data compression; and performing the data compression upon each encoding unit of the image frame, and generating an output bitstream to the frame buffer based on a data compression result of the encoding unit. A processing result of each access unit includes each output bitstream of the at least one encoding unit included in the access unit; a plurality of processing results of the access units are stored in a plurality of storage spaces allocated in the frame buffer, respectively; and a size of each of the storage spaces is equal to a size of a corresponding access unit.
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公开(公告)号:US10306246B2
公开(公告)日:2019-05-28
申请号:US15010062
申请日:2016-01-29
Applicant: MediaTek Inc.
Inventor: Ping Chao , Huei-Min Lin , Chih-Ming Wang , Yung-Chang Chang
Abstract: A method and apparatus for loop filter processing of reconstructed video data for a video coding system are disclosed. The system receives reconstructed video data for an image unit. The loop filter processing is applied to reconstructed pixels above a deblocking boundary of the current CTU. In order to reduce line buffer requirement and/or to reduce loop filter switching for image units, the sample adaptive offset (SAO) parameter boundary and spatial-loop-filter restricted boundary for the luma and chroma components are determined by global consideration. In one embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary are aligned for the luma and chroma components respectively. In another embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary for the luma and chroma components are all aligned.
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公开(公告)号:US10298951B2
公开(公告)日:2019-05-21
申请号:US15832959
申请日:2017-12-06
Applicant: MEDIATEK INC.
Inventor: Min-Hao Chiu , Chia-yun Cheng , Yung-Chang Chang
IPC: H04N19/513 , H04N19/55 , H04N19/52 , H04N19/573
Abstract: A method and apparatus for video encoding or decoding used by an AVS2 (Second Generation of Audio Video Coding Standard) video encoder or decoder respectively are disclosed. According to this method, first motion vectors associated with spatial neighboring blocks of a current block are determined. For each spatial neighboring block, a value of 1 is assigned to a first BlockDistance associated with the spatial neighboring block if a corresponding first reference picture is a G picture or GB picture. Motion vector predictor candidates are derived from the first motion vectors by scaling each first motion vector according to a corresponding first BlockDistance and a current BlockDistance. A final motion vector predictor is determined among the motion vector predictor candidates. The current motion vector is encoded or decoded using the final motion vector predictor
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公开(公告)号:US20190075312A1
公开(公告)日:2019-03-07
申请号:US16124170
申请日:2018-09-06
Applicant: MEDIATEK INC.
Inventor: Yung-Chang Chang , Chia-Yun Cheng , Chih-Ming Wang , Meng-Jye Hu , Cheng-Han Li
Abstract: A video decoding method is used for decoding a multi-plane video bitstream. The multi-plane video bitstream includes a first video subset bitstream corresponding to a fundamental plane (FP) and at least one second video subset bitstream corresponding to at least one augmented plane (AP). The video decoding method includes decoding the first video subset bitstream, decoding the at least one second video subset bitstream, and performing resampling of one decoded FP frame to generate one resampled frame. Decoding the first video subset bitstream includes performing decoding of a first FP frame to generate a first decoded FP frame. Decoding the at least one second video subset bitstream includes performing decoding of a first AP frame to generate a first decoded AP frame. A processing time of performing decoding of the first FP frame overlaps a processing time of performing resampling of said one decoded FP frame.
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96.
公开(公告)号:US20180329371A1
公开(公告)日:2018-11-15
申请号:US15974701
申请日:2018-05-09
Applicant: MEDIATEK INC.
Inventor: Huei-Min Lin , Yi-Chang Chen , Chih-Ming Wang , Yung-Chang Chang
Abstract: A data processing system includes a buffer, a design under checking (DUC), and a self-checking circuit. The buffer is used to buffer data generated from a source device. The DUC is used to perform a designated function upon data read from the buffer when operating under a normal mode. The self-checking circuit is used to apply logic functional checking to the DUC when the DUC operates under a self-checking mode. When the DUC operates under the self-checking mode, the buffer keeps buffering data generated from the source device.
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公开(公告)号:US10123028B2
公开(公告)日:2018-11-06
申请号:US15028717
申请日:2015-09-17
Applicant: MEDIATEK INC.
Inventor: Ming-Long Wu , Chia-Yun Cheng , Yung-Chang Chang
IPC: H04N19/70 , H04N19/436 , H04N19/593 , H04N19/91 , H04N19/127 , H04N19/172 , H04N19/174 , H04N19/184 , H04N19/44
Abstract: A syntax parsing apparatus includes a plurality of syntax parsing circuits and a dispatcher. Each of the syntax parsing circuits has at least entropy decoding capability. The syntax parsing circuits generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively. The dispatcher assigns bitstream start points of the image regions to the syntax parsing circuits, and triggers the syntax parsing circuits to start entropy decoding, respectively.
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公开(公告)号:US10070070B2
公开(公告)日:2018-09-04
申请号:US14722162
申请日:2015-05-27
Applicant: MEDIATEK INC.
Inventor: Meng-Jye Hu , Yung-Chang Chang , Chia-Yun Cheng
IPC: H04B1/66 , H04N5/262 , H04N19/159 , H04N19/176 , H04N19/70 , H04N19/122 , H04N19/136
Abstract: One exemplary video processing apparatus includes a control circuit and a size selection circuit. The control circuit determines picture boundary information. The size selection circuit refers to at least the picture boundary information to select a size for a block associated with encoding of a picture, wherein selection of the size is constrained by the picture boundary information to ensure that the block with the selected size is not across a picture boundary of the picture.
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公开(公告)号:US09912968B2
公开(公告)日:2018-03-06
申请号:US14767912
申请日:2015-01-21
Applicant: MEDIATEK INC.
Inventor: Chia-Yun Cheng , Chi-Cheng Ju , Yung-Chang Chang , Chih-Ming Wang
IPC: H04N19/91 , H04N19/176 , H04N19/60 , H04N19/44 , H04N19/463 , H04N19/129 , H04N19/70 , H04N19/18 , H04N19/82
CPC classification number: H04N19/91 , H04N19/129 , H04N19/176 , H04N19/18 , H04N19/44 , H04N19/463 , H04N19/60 , H04N19/70 , H04N19/82
Abstract: A decoding apparatus has an arithmetic decoder and a controller. A counter logic of the controller generates a first statistics result according to a first syntax element decoding result. A control logic of the controller instructs the arithmetic decoder to perform a first scan procedure at least once to generate the first syntax element decoding result of transform coefficients of a transform coefficient block, controls a repetition number of a second scan procedure based at least partly on the first statistics result, and instructs the arithmetic decoder to perform the second scan procedure at least once to generate a second syntax element decoding result of the transform coefficients. The first scan procedure decodes a first coded syntax element of one transform coefficient when performed by the arithmetic decoder once. The second scan procedure decodes a second coded syntax element of one transform coefficient when performed by the arithmetic decoder once.
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公开(公告)号:US09813739B2
公开(公告)日:2017-11-07
申请号:US15468132
申请日:2017-03-24
Applicant: MEDIATEK INC.
Inventor: Sheng-Jen Wang , Yung-Chang Chang , Chia-Yun Cheng
IPC: H04N19/10 , H04N19/91 , H04N19/423
CPC classification number: H04N19/91 , H04N19/423
Abstract: A backward adaptation apparatus includes a first storage apparatus, a count table maintenance apparatus, and a backward probability update circuit. The first storage apparatus has a first buffer and a second buffer allocated therein. The first buffer stores a first probability table involved in processing of a first frame. The second buffer stores a second probability table selectable for processing of a second frame following the first frame. The count table maintenance apparatus maintains a count table, wherein the count table maintenance apparatus has at least one count data updating circuit shared for dynamically updating the count table during the processing of the first frame. The backward probability update circuit refers to information of the count table and information of the first probability table to calculate the second probability table in the second buffer at an end of the processing of the first frame.
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