Shift register unit, shift register circuit, array substrate and display device
    93.
    发明授权
    Shift register unit, shift register circuit, array substrate and display device 有权
    移位寄存器单元,移位寄存器电路,阵列基板和显示装置

    公开(公告)号:US09576524B2

    公开(公告)日:2017-02-21

    申请号:US13978296

    申请日:2012-12-11

    Abstract: A shift register unit, a shift register circuit, an array substrate and a display device are provided. The present disclosure relates to the field of display device manufacture, and can prevent an OLED device from flickering while writing display data. A shift register comprises a first pull-up unit, connected with a high level end, a first clock signal end and a first control node (A); a first pull-down unit, connected with a low level end, a second clock signal end, an input signal end, the first pull-up unit, a first output end and the first control node (A); a pull-down switch unit, connected with the high level end, the low level end, the first clock signal end, the second clock signal end and a second control node (B); a second pull-down unit, connected with the low level end, the second control node (B) and a second output end; and a second pull-up unit, connected with the high level end, the first control node (A) and the second output end.

    Abstract translation: 提供了移位寄存器单元,移位寄存器电路,阵列基板和显示装置。 本公开涉及显示装置制造领域,并且可以防止OLED装置在写入显示数据时闪烁。 移位寄存器包括与高电平端连接的第一上拉单元,第一时钟信号端和第一控制节点(A); 与低电平端连接的第一下拉单元,第二时钟信号端,输入信号端,第一上拉单元,第一输出端和第一控制节点(A); 与高电平端连接的下拉开关单元,低电平端,第一时钟信号端,第二时钟信号端和第二控制节点(B); 与低级端连接的第二下拉单元,第二控制节点(B)和第二输出端; 以及与高级端连接的第二上拉单元,第一控制节点(A)和第二输出端。

    Mask plate, method for fabricating array substrate using the same, and array substrate
    94.
    发明授权
    Mask plate, method for fabricating array substrate using the same, and array substrate 有权
    掩模板,使用其制造阵列基板的方法和阵列基板

    公开(公告)号:US09423687B2

    公开(公告)日:2016-08-23

    申请号:US13974223

    申请日:2013-08-23

    Abstract: Embodiments of the invention provide a mask plate, a method for fabricating an array substrate using the mask plate, and an array substrate. The mask plate is used for fabricating the array substrate by a stitching exposure. The mask plate comprises 2n+1 mask patterns successively arranged and parallel to each other, where n is any natural number, each mask pattern includes a light-shielding pattern corresponding to a portion of a data signal line on the array substrate. The light-shielding patterns of two adjacent mask patterns are discontinuous, and the portions on both sides of the light-shielding pattern of the mask pattern located in the middle of the mask plate are asymmetric.

    Abstract translation: 本发明的实施例提供一种掩模板,使用掩模板制造阵列基板的方法和阵列基板。 掩模板用于通过缝合曝光来制造阵列基板。 掩模板包括相互排列并且彼此平行的2n + 1个掩模图案,其中n是任何自然数,每个掩模图案包括对应于阵列基板上的数据信号线的一部分的遮光图案。 两个相邻掩模图案的遮光图案是不连续的,并且位于掩模板中间的掩模图案的遮光图案的两侧上的部分是不对称的。

    Gate on array driver unit, gate on array driver circuit, and display device
    95.
    发明授权
    Gate on array driver unit, gate on array driver circuit, and display device 有权
    阵列驱动单元上的门,阵列驱动电路上的栅极和显示装置

    公开(公告)号:US09231564B2

    公开(公告)日:2016-01-05

    申请号:US14125824

    申请日:2012-11-12

    Abstract: A gate on array driver unit, a gate on array driver circuit, and a display device. The gate on array driver unit comprises an input sampling unit, an output unit, a reset unit, and a storage capacitor. The storage capacitor is connected at a first end thereof to a gate electrode driving signal output end of the present stage. The input sampling unit is connected to a second end of the storage capacitor, and, under the control of a gate electrode driving signal of a previous stage of the gate on array driver unit, precharges the storage capacitor and allows the gate driving signal of the present stage to sample the input signal. The output unit is connected to the second end of the storage capacitor, and, when the input sampling unit completes the precharging of the storage capacitor, controls the output of the gate electrode driving signal of the present stage. The reset unit, under the control of the gate electrode driving signal of the gate on array driver unit of a next stage, resets the gate electrode driving signal of the present stage. Employment of the gate on array driver unit allows for reduced circuit layout area for the gate on array driver circuit.

    Abstract translation: 阵列驱动器单元上的栅极,阵列驱动电路上的栅极和显示器件。 阵列驱动器单元上的栅极包括输入采样单元,输出单元,复位单元和存储电容器。 存储电容器的第一端连接到本阶段的栅电极驱动信号输出端。 输入采样单元连接到存储电容器的第二端,并且在阵列驱动器单元上的栅极的前级的栅电极驱动信号的控制下,对存储电容器进行预充电,并允许存储电容器的栅极驱动信号 目前阶段对输入信号进行采样。 输出单元连接到存储电容器的第二端,并且当输入采样单元完成存储电容器的预充电时,控制当前级的栅电极驱动信号的输出。 复位单元在下一级的阵列驱动器单元上的栅极的栅电极驱动信号的控制下复位当前级的栅电极驱动信号。 在阵列驱动器单元上使用门允许减少阵列驱动电路上的栅极的电路布局面积。

    Light-emitting control circuit, light-emitting control method and shift register
    96.
    发明授权
    Light-emitting control circuit, light-emitting control method and shift register 有权
    发光控制电路,发光控制方式和移位寄存器

    公开(公告)号:US09113534B2

    公开(公告)日:2015-08-18

    申请号:US14126640

    申请日:2012-11-21

    Abstract: A light-emitting control circuit, a light-emitting control method and a shift register. The light-emitting control circuit comprises an inputting terminal (Input), an input sampling unit (11), an outputting unit (12), a resetting unit (13), an output pulling-down unit (14) and an outputting terminal for a light-emitting control signal (EM[n]). The input sampling unit (11) samples an input signal under a control of a first clock signal (CK1); the outputting unit (12) generates a light-emitting control signal under a control of a second clock signal (CK2) after the input sampling unit (11) samples the input signal; the resetting unit (13) resets the light-emitting control signal through the output pulling-down unit (14) under a control of a third clock signal (13). An OLED device is in an OFF state during a process for writing display data into pixel cells and the OLED device is turned on to emit light after the display data is written into the pixel cells, thus a display image is guaranteed not to generate flickers due to an unstable state of a pixel circuit as the data is written.

    Abstract translation: 发光控制电路,发光控制方法和移位寄存器。 发光控制电路包括输入端子(Input),输入采样单元(11),输出单元(12),复位单元(13),输出下拉单元(14)和输出端子 发光控制信号(EM [n])。 输入采样单元(11)在第一时钟信号(CK1)的控制下采样输入信号; 输出单元(12)在输入采样单元(11)对输入信号进行采样之后,在第二时钟信号(CK2)的控制下产生发光控制信号; 复位单元(13)在第三时钟信号(13)的控制下通过输出拉出单元(14)复位发光控制信号。 在将显示数据写入像素单元的过程中,OLED器件处于截止状态,并且在将显示数据写入像素单元之后,OLED器件导通以发光,从而保证显示图像不会产生闪烁 到数据写入时的像素电路的不稳定状态。

    GATE ON ARRAY DRIVER UNIT, GATE ON ARRAY DRIVER CIRCUIT, AND DISPLAY DEVICE
    99.
    发明申请
    GATE ON ARRAY DRIVER UNIT, GATE ON ARRAY DRIVER CIRCUIT, AND DISPLAY DEVICE 有权
    阵列驱动单元上的门,阵列驱动电路上的门和显示设备

    公开(公告)号:US20140132491A1

    公开(公告)日:2014-05-15

    申请号:US14125824

    申请日:2012-11-12

    Abstract: A gate on array driver unit, a gate on array driver circuit, and a display device. The gate on array driver unit comprises an input sampling unit, an output unit, a reset unit, and a storage capacitor. The storage capacitor is connected at a first end thereof to a gate electrode driving signal output end of the present stage. The input sampling unit is connected to a second end of the storage capacitor, and, under the control of a gate electrode driving signal of a previous stage of the gate on array driver unit, precharges the storage capacitor and allows the gate driving signal of the present stage to sample the input signal. The output unit is connected to the second end of the storage capacitor, and, when the input sampling unit completes the precharging of the storage capacitor, controls the output of the gate electrode driving signal of the present stage. The reset unit, under the control of the gate electrode driving signal of the gate on array driver unit of a next stage, resets the gate electrode driving signal of the present stage. Employment of the gate on array driver unit allows for reduced circuit layout area for the gate on array driver circuit.

    Abstract translation: 阵列驱动器单元上的栅极,阵列驱动电路上的栅极和显示器件。 阵列驱动器单元上的栅极包括输入采样单元,输出单元,复位单元和存储电容器。 存储电容器的第一端连接到本阶段的栅电极驱动信号输出端。 输入采样单元连接到存储电容器的第二端,并且在阵列驱动器单元上的栅极的前级的栅电极驱动信号的控制下,对存储电容器进行预充电,并允许存储电容器的栅极驱动信号 目前阶段对输入信号进行采样。 输出单元连接到存储电容器的第二端,并且当输入采样单元完成存储电容器的预充电时,控制当前级的栅电极驱动信号的输出。 复位单元在下一级的阵列驱动器单元上的栅极的栅电极驱动信号的控制下复位当前级的栅电极驱动信号。 在阵列驱动器单元上使用门允许减少阵列驱动电路上的栅极的电路布局面积。

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