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公开(公告)号：US4370618A
公开(公告)日：1983-01-25
申请号：US152121
申请日：1980-05-21
申请人： Michael J. Walker
发明人： Michael J. Walker
摘要： A circuit for recognizing cyclically occurring pulse sequences includes a counter controlled by a D-type flip-flop circuit to start counting the pulses in the pulse sequence when a specific pulse event occurs. The output of the counter is compared by a comparator with a preset number to provide an output via a gate if the specific pulse event occurs when the number of pulses counted by the counter is equal to the preset number. If the count rises above the preset number the comparator resets the flip-flop and no output is produced by the gate.
摘要翻译： 用于识别循环发生的脉冲序列的电路包括由D型触发器电路控制的计数器，以在特定脉冲事件发生时开始对脉冲序列中的脉冲进行计数。 如果当计数器计数的脉冲数等于预设数量时，如果特定脉冲事件发生，计数器的输出由具有预设数字的比较器进行比较，以提供经由门的输出。 如果计数高于预设值，则比较器复位触发器，并且门不产生输出。
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公开(公告)号：US4344036A
公开(公告)日：1982-08-10
申请号：US114984
申请日：1980-01-24
申请人： Housan Dakroub , David J. Concannon
发明人： Housan Dakroub , David J. Concannon
CPC分类号： G06F1/08
摘要： A skip count clock generator yielding multiple frequencies of clock pulses for variably driving a scanner to produce a required resolution of scanned data includes a base frequency generator of clock pulses and a device for establishing a periodic clock pulse cycle. An electrical logic circuit is used to skip any chosen whole number of clock pulses in a period to yield a desired fraction of the clock pulse cycle.
摘要翻译： 产生多个时钟脉冲频率的跳跃计数时钟发生器，用于可变地驱动扫描器以产生扫描数据的所需分辨率，包括时钟脉冲的基本频率发生器和用于建立周期性时钟脉冲周期的装置。 电逻辑电路用于在一段时间内跳过任何选定的整数个时钟脉冲以产生时钟脉冲周期的期望分数。
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3.发明授权Method and circuitry for synchronizing the read and update functions of a timer/counter circuit 失效用于同步定时器/计数器电路的读取和更新功能的方法和电路
公开(公告)号：US4341950A
公开(公告)日：1982-07-27
申请号：US114925
申请日：1980-01-24
CPC分类号： H03K21/12
摘要： The present invention pertains to a method and synchronizer circuit for controlling the counting operation of a timer/counter circuit to synchronize the read and update functions of this circuit. The synchronizer circuit is capable of establishing a search period prior to the occurrence of each update function. During each such search period, the synchronizer circuit searches for a read command. If a read command is not received by the synchronizer circuit within the search period preceding the occurrence of an update function, the synchronizer circuit allows the update function to occur without delay. If a read command is received by the synchronizer circuit within the search period preceding the occurrence of an update function, the synchronizer circuit delays the start of the update function until after termination of the read command that was received within the search period.
摘要翻译： 本发明涉及一种用于控制定时器/计数器电路的计数操作以同步该电路的读取和更新功能的方法和同步器电路。 同步器电路能够在每个更新功能发生之前建立一个搜索周期。 在每个这样的搜索周期期间，同步器电路搜索读取命令。 如果在发生更新功能之前的搜索周期内同步器电路没有接收到读命令，则同步器电路允许更新功能无延迟地发生。 如果同步电路在更新功能发生之前的搜索周期内接收到读命令，则同步器电路延迟更新功能的开始，直到在搜索周期内接收到的读命令结束。
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4.发明授权Method and apparatus for determining whether an electronic taximeter is in proper working order 失效用于确定电子计程计是否处于正常工作状态的方法和装置
公开(公告)号：US4021645A
公开(公告)日：1977-05-03
申请号：US594462
申请日：1975-07-11
摘要： A testing switch is activated manually by the taxi driver or automatically at the end of a trip. When the testing switch is activated, a preselected plurality of pulses is applied to the computing means of the electronic taximeter. If the taximeter is in proper working order, the indicating means of the taximeter will successively and in unison display the numerals from 0 to 9 at the rate or about one per second. If the numerals do not appear in the proper sequence, or if the driver perceives that they appear at a rate markedly different from one per second, or if some or all do not appear whatsoever, he knows that the electronic taximeter is not in proper working order.
摘要翻译： 测试开关由出租车司机手动激活或在行程结束时自动激活。 当测试开关被激活时，预先选择的多个脉冲被施加到电子计程计的计算装置。 如果计程表工作正常，则计程表的指示装置会连续一致地以0或9的数字显示数字，速率或每秒大约一次。 如果数字没有以正确的顺序出现，或者驾驶员觉察到它们出现的速度与每秒显着不同，或者如果有些或全部没有显示出来，他知道电子计程仪没有正常工作 订购。
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公开(公告)号：US3980867A
公开(公告)日：1976-09-14
申请号：US534634
申请日：1974-12-19
申请人： Thomas R. Potter
发明人： Thomas R. Potter
摘要： A monitoring system is provided for use in conjunction with a wire loop which is embedded in a roadway, and which senses the presence of vehicles in the roadway to control a traffic signal. The monitoring system senses the output of the loop oscillator which is included in the traffic control circuitry and which generates a loop signal and whose frequency-determining circuit includes the wire loop to indicate immediately any failure in the loop circuit. If for any reason the loop oscillator fails to operate, that fact will be sensed immediately by the monitoring system of the invention, and such a failure will be equated to a failure in the embedded loop, or in the lead-in circuit which connects the loop to the loop oscillator. A digital embodiment of the monitoring system of the invention includes a reference oscillator which generates a reference signal whose frequency is lower than the frequency of the loop signal, and it also includes a two-count binary counter which is clocked by the reference signal, and which is cleared by the loop signal so that the counter cannot exceed a count of one, so long as the loop oscillator is functioning. However, should the loop oscillator fail, indicating a failure condition in the loop, the counter will then proceed to the count of two, and that count will set a flip-flop to activate an appropriate indicator. The flip-flop will remain set and the indicator activated, until reset by appropriate manual means. An analog embodiment of the monitoring system of the invention is also provided.
摘要翻译： 提供了一种监视系统，其与嵌入在道路中的线环一起使用，并且其感测道路中的车辆的存在以控制交通信号。 监控系统感测业务控制电路中包含的环路振荡器的输出，并产生一个环路信号，并且其频率确定电路包括有线环路以立即指示环路电路中的任何故障。 如果由于任何原因造成环路振荡器无法操作，则该事实将立即由本发明的监视系统感测到，并且这样的故障将等同于嵌入式环路中的故障或连接 循环到环路振荡器。 本发明的监视系统的数字实施例包括产生频率低于环路信号频率的参考信号的参考振荡器，并且还包括由参考信号计时的双计数二进制计数器，以及 只要环路振荡器正常工作，该信号被环路信号清除，使得计数器不能超过一个计数。 然而，如果环路振荡器出现故障，指示循环中的故障状态，计数器将继续进行两次计数，该计数将设置触发器来激活适当的指示器。 触发器将保持置位状态，指示灯激活，直到通过适当的手动方式复位。 还提供了本发明的监视系统的模拟实施例。
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公开(公告)号：US3939333A
公开(公告)日：1976-02-17
申请号：US495949
申请日：1974-08-09
申请人： Eugene Elwin Keech
发明人： Eugene Elwin Keech
CPC分类号： G06F11/0772
摘要： The method of storing, without interruption, digital signals having asynchronous transitions and reproducing these digital signals upon an expanded time scale after the occurrence of a fault.The apparatus comprises an input counter, an output counter, an adder operated to subtract, and a latched gate by which the adder stops the output counter when the outputs of the two counters are equivalent. The least-significant-bit of the output counter comprises the output signal, which is stored in a register. A second register simultaneously stores an output from the adder which signifies that more than one pulse is stored in the input counter. After occurrence of a fault the data in the two registers are combined in a modulator for display on an oscilloscope. A complete unit typically includes several channels for simultaneous display; each channel including the apparatus described above.
摘要翻译： 在不中断的情况下存储具有异步转换的数字信号并且在发生故障之后在扩展的时间尺度上再现这些数字信号的方法。
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公开(公告)号：US3806709A
公开(公告)日：1974-04-23
申请号：US27742472
申请日：1972-08-02
摘要： An arrangement for controlling the output information of a sequence counter includes a set of output logic gates responsive to the counter output information for generating sequencing information, a blanking circuit for inhibiting each one of the plurality of logic gates, and a control circuit responsive to counter-advancing signals for energizing the blanking circuit and for permitting the counter to generate the sequencing information after a first predetermined time interval following the energization of the blanking circuit, the control circuit deenergizing the blanking circuit after a second predetermined time interval following the first time interval to permit the gates to respond to a group of signals. Thus, the blanking circuit and the control circuit enable the counter to be advanced to a subsequent sequence state before the output logic gates generate the sequencing information so that the stages of the counter are switched to the next state during the second time interval and thus erroneous sequencing information is prevented from being generated during the transition period between sequence states.
摘要翻译： 用于控制序列计数器的输出信息的装置包括响应于用于产生排序信息的计数器输出信息的一组输出逻辑门，用于禁止多个逻辑门中的每一个的消隐电路，以及响应于计数器的控制电路 - 用于激励消隐电路并允许计数器在消隐电路通电之后的第一预定时间间隔之后产生排序信息，所述控制电路在第一预定时间间隔之后的第二预定时间间隔之后使消隐电路断电 时间间隔允许门响应一组信号。 因此，消隐电路和控制电路使得计数器能够在输出逻辑门产生排序信息之前前进到随后的序列状态，使得计数器的级在第二时间间隔期间切换到下一个状态，从而错误地 在序列状态之间的过渡期间防止了排序信息的产生。
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公开(公告)号：US3794815A
公开(公告)日：1974-02-26
申请号：US3794815D
申请日：1971-10-14
发明人： GODWIN G , AIGUESVIVES A
摘要： A weighing system totalizer wherein a pulse generator produces pulses at a constant repetition frequency to be counted in by a counting device, wherein a digital-to-analog converter cumulatively converts the generator-produced pulses into a feedback d.c. signal, and wherein a signal comparing circuit is responsive to the feedback d.c. signal and to a weightrepresenting d.c. signal to start and stop operation of the pulse generator for providing a generator-produced pulse train in which the number of pulses is representive of the magnitude of the weight-representing d.c. signal.
摘要翻译： 一种称重系统累加器，其中脉冲发生器以恒定的重复频率产生将由计数装置计数的脉冲，其中数模转换器将发生器产生的脉冲累积地转换为反馈直流。 信号，并且其中信号比较电路响应反馈直流。 信号和重量代表。 用于提供发生器产生的脉冲串的脉冲发生器的起始和停止操作的信号，其中脉冲数表示权重表示直流的大小。 信号。
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公开(公告)号：US3610895A
公开(公告)日：1971-10-05
申请号：US3610895D
申请日：1969-04-24
申请人： ARE INC
发明人： WOLLESEN DONALD L
CPC分类号： G04F10/04
摘要： Timing of a vehicle between two points from a standstill or between two points while moving is accomplished by using a first bistable device to provide pulses to a counter and a second bistable device to prevent application of pulses to the counter. The first bistable device is actuated by a radiation-responsive device or a vehicle movement responsive device whereas the second bistable device is only actuated by the radiation-responsive device. The bistable devices are interconnected to prevent both from being actuated simultaneously and means are provided to prevent the second bistable device from being inadvertently actuated by extraneous sources of radiation.
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