公开(公告)号：US12046666B2

公开(公告)日：2024-07-23

申请号：US17330012

申请日：2021-05-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chang Soo Suh ,  Sameer Prakash Pendharkar ,  Naveen Tipirneni ,  Jungwoo Joh

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/308 ,  H01L29/20 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/778 ,  H01L21/0254 ,  H01L21/308 ,  H01L29/2003 ,  H01L29/41725 ,  H01L29/42312 ,  H01L29/66462

Abstract: In some examples, a gallium nitride (GaN)-based transistor, comprises a substrate; a GaN layer supported by the substrate; an aluminum nitride gallium (AlGaN) layer supported by the GaN layer; a p-doped GaN structure supported by the AlGaN layer; and multiple p-doped GaN blocks supported by the AlGaN layer, each of the multiple p-doped GaN blocks physically separated from the remaining multiple p-doped GaN blocks, wherein first and second contours of a two-dimensional electron gas (2DEG) of the GaN-based transistor are at an interface of the AlGaN and GaN layers.

公开(公告)号：US10381456B2

公开(公告)日：2019-08-13

申请号：US15587021

申请日：2017-05-04

Applicant: Texas Instruments Incorporated

Inventor： Chang Soo Suh ,  Dong Seup Lee ,  Jungwoo Joh ,  Naveen Tipirneni ,  Sameer Prakash Pendharkar

IPC: H01L29/778 ,  H01L29/66 ,  H01L23/535 ,  H01L29/10 ,  H01L21/8252 ,  H01L27/06 ,  H01L27/085 ,  H01L29/20 ,  H01L27/07 ,  H01L27/088

Abstract: An enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer on the substrate, a Group IIIA-N barrier layer on the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A p-GaN layer is on the barrier layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on the p-GaN layer. A gate electrode is over the n-GaN layer. A drain having a drain contact is on the barrier layer to provide contact to the active layer, and a source having a source contact is on the barrier layer provides contact to the active layer. The tunnel diode provides a gate contact to eliminate the need to form a gate contact directly to the p-GaN layer.

公开(公告)号：US20230134698A1

公开(公告)日：2023-05-04

申请号：US17514550

申请日：2021-10-29

Applicant: Texas Instruments Incorporated

Inventor： Jungwoo Joh ,  Sameer Prakash Pendharkar ,  Qhalid RS Fareed ,  Chang Soo Suh

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/66 ,  H01L29/20

Abstract: A gallium nitride (“GaN”)-based semiconductor device, and method of forming the same. In one example, the semiconductor device includes a channel layer including GaN, and a barrier layer of a first III-N material over the channel layer. The semiconductor device also includes a cap layer of a second III-N material including indium over the barrier layer, wherein the cap layer may have the effect of modifying a threshold voltage and gate leakage current of the semiconductor device.

公开(公告)号：US11049960B2

公开(公告)日：2021-06-29

申请号：US16294687

申请日：2019-03-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chang Soo Suh ,  Sameer Prakash Pendharkar ,  Naveen Tipirneni ,  Jungwoo Joh

IPC: H01L29/872 ,  H01L29/205 ,  H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/423 ,  H01L21/308 ,  H01L29/417 ,  H01L21/02

Abstract: In some examples, a gallium nitride (GaN)-based transistor, comprises a substrate; a GaN layer supported by the substrate; an aluminum nitride gallium (AlGaN) layer supported by the GaN layer; a p-doped GaN structure supported by the AlGaN layer; and multiple p-doped GaN blocks supported by the AlGaN layer, each of the multiple p-doped GaN blocks physically separated from the remaining multiple p-doped GaN blocks, wherein first and second contours of a two-dimensional electron gas (2DEG) of the GaN-based transistor are at an interface of the AlGaN and GaN layers.

公开(公告)号：US10707324B2

公开(公告)日：2020-07-07

申请号：US16456040

申请日：2019-06-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chang Soo Suh ,  Dong Seup Lee ,  Jungwoo Joh ,  Naveen Tipirneni ,  Sameer Prakash Pendharkar

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/10 ,  H01L21/8252 ,  H01L27/06 ,  H01L27/085 ,  H01L23/535 ,  H01L29/20 ,  H01L27/07 ,  H01L27/088

Abstract: One example provides an enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer over the substrate, a Group IIIA-N barrier layer over the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A gate stack is located between source and drain contacts to the active layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on a p-GaN layer located on the barrier layer.