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1.
公开(公告)号:US20210334225A1
公开(公告)日:2021-10-28
申请号:US17241564
申请日:2021-04-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungho Seo , Kwanwoo Noh , Myungsub Shin , Dongwoo Nam
Abstract: A storage device capable of performing high-speed link startup and a storage system including the storage device are disclosed. A link startup method of the storage device includes receiving a line-reset signal from a host through a line connected to an input signal pin of the storage device, comparing a length of the received line-reset signal with a first reference time, and performing a link startup operation in a high-speed mode or a low-speed mode between the storage device and the host according to a comparing result.
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公开(公告)号:US10572413B2
公开(公告)日:2020-02-25
申请号:US15685586
申请日:2017-08-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyuntae Park , Youngmin Lee , Sungho Seo , Hwaseok Oh , JinHyeok Choi
IPC: G06F13/28 , G06F11/30 , H04L12/40 , H04L12/403 , H04L29/08 , G06F12/1081 , H04L1/18
Abstract: According to at least some example embodiments of the inventive concepts, an electronic device includes an embedded storage device that is, configured to connect to a removable storage device, and configured to directly communicate with the removable storage device, when connected to the removable storage device; and an application processor connected to directly communicate with the embedded storage device and not directly connected with the removable storage device, wherein, the embedded storage device is configured to, in response to a disable command received from the application processor, decrease an amount of power supplied to all or some of circuits included in the embedded storage device, and provide a bypass path that is configured to transfer a normal command and data from the application processor to the removable storage device, when the removable storage device is connected to the bypass path.
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公开(公告)号:US10424346B2
公开(公告)日:2019-09-24
申请号:US15700257
申请日:2017-09-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungho Seo , Hyuntae Park , Youngmin Lee , Hwaseok Oh , JinHyeok Choi
Abstract: An electronic device may include an embedded storage device connected to directly communicate with an extended storage device, and an application processor connected to directly communicate with the embedded storage device and connected to the extended storage device through the embedded storage device. The embedded storage device includes a monitoring device that monitors commands received from the application processor. The monitoring device generates a command state signal representing a state of the embedded storage device and the extended storage device based on a result of monitoring the commands. The embedded storage device operates so that a power supply is controlled in a part or all of the embedded storage device according to the command state signal.
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公开(公告)号:US20180089116A1
公开(公告)日:2018-03-29
申请号:US15685586
申请日:2017-08-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyuntae PARK , Youngmin Lee , Sungho Seo , Hwaseok Oh , JinHyeok Choi
IPC: G06F13/28 , H04L29/08 , G06F11/30 , H04L12/40 , H04L12/403
Abstract: According to at least some example embodiments of the inventive concepts, an electronic device includes an embedded storage device that is, configured to connect to a removable storage device, and configured to directly communicate with the removable storage device, when connected to the removable storage device; and an application processor connected to directly communicate with the embedded storage device and not directly connected with the removable storage device, wherein, the embedded storage device is configured to, in response to a disable command received from the application processor, decrease an amount of power supplied to all or some of circuits included in the embedded storage device, and provide a bypass path that is configured to transfer a normal command and data from the application processor to the removable storage device, when the removable storage device is connected to the bypass path.
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公开(公告)号:US11726677B2
公开(公告)日:2023-08-15
申请号:US17142627
申请日:2021-01-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwanwoo Noh , Sungho Seo , Yongwoo Jeong
IPC: G06F3/06 , G06F9/44 , G06F9/4401 , G06F1/04
CPC classification number: G06F3/0625 , G06F1/04 , G06F3/0653 , G06F3/0659 , G06F3/0679 , G06F9/4418
Abstract: Disclosed is a storage device which includes an interface circuit that exchanges data with a host device, and a power management unit that supplies a power to the interface circuit. The interface circuit includes a first input terminal receiving a first signal from the host device, a second input terminal receiving a second signal complementary to the first signal from the host device, a receive module processing the first signal and the second signal, a squelch circuit detecting levels of the first signal and the second signal, and a reference clock detector detecting whether a reference clock for operating the storage device is received. The power management unit selectively supplies a power to the squelch circuit based on a result of the detection by the reference clock detector.
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公开(公告)号:US11675531B2
公开(公告)日:2023-06-13
申请号:US17328225
申请日:2021-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Nam , Sungho Seo , Kwanwoo Noh , Myungsub Shin , Haesung Jung
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679 , G06F13/1668 , G06F13/385 , G06F13/4278
Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.
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公开(公告)号:US11561912B2
公开(公告)日:2023-01-24
申请号:US17321916
申请日:2021-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myungsub Shin , Sungho Seo , Kwanwoo Noh , Seongyong Jang , Haesung Jung
Abstract: A host controller interface configured to provide interfacing between a host device and a storage device includes processing circuitry; a doorbell register configured to store a head pointer and a tail pointer of one or more first queues; and an entry buffer configured to store a first command from one of the one or more first queues in the entry buffer, wherein the processing circuitry is configured to, determine an order in which the commands of the one or more first queues are to be processed, route the first command to be stored in the entry buffer according to the determined order, and route a first response to be stored in one of one or more second queues.
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公开(公告)号:US10986222B2
公开(公告)日:2021-04-20
申请号:US16229540
申请日:2018-12-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Songkyu Kim , Yongwoon Moon , Insoo Lee , Junehee Lee , Sungho Seo , Kwangjae Woo , Youngil Chang , Bonggoo Jun
Abstract: An electronic device is provided. The electronic device includes a display, at least one communication circuit, and at least one processor configured to control the display and the at least one communication circuit. The at least one processor is configured to obtain a communication state using the at least one communication circuit during a packet based voice call, and to stop transmitting data associated with at least one of a plurality of background applications which operate in a background of an operating system (OS) of the electronic device when the communication state meets a specified first condition.
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9.
公开(公告)号:US11625342B2
公开(公告)日:2023-04-11
申请号:US17241564
申请日:2021-04-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungho Seo , Kwanwoo Noh , Myungsub Shin , Dongwoo Nam
Abstract: A storage device capable of performing high-speed link startup and a storage system including the storage device are disclosed. A link startup method of the storage device includes receiving a line-reset signal from a host through a line connected to an input signal pin of the storage device, comparing a length of the received line-reset signal with a first reference time, and performing a link startup operation in a high-speed mode or a low-speed mode between the storage device and the host according to a comparing result.
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公开(公告)号:US10942887B2
公开(公告)日:2021-03-09
申请号:US16701687
申请日:2019-12-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngmin Lee , Sungho Seo , Hyuntae Park , Hwaseok Oh
Abstract: A device includes a first input/output (I/O) port for communication with an external processor, a second I/O port for communication with a second device, and an interface adaptor supporting communication through the first and second I/O ports via a protocol having a plurality of layers, including an application layer, a physical layer, and a physical adaptor layer. The application layer processes information according to an application layer format and the physical adaptor layer processes information according to a physical adaptor layer format. The device receives from the external processor through the first I/O port a request in the application layer format that one or more communication conditions be set for a physical layer of the second device, converts the request from the application layer format to the physical adaptor layer format, and sends the converted request in the physical adaptor layer format to the second device through the second I/O port.
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