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公开(公告)号:US20240014304A1
公开(公告)日:2024-01-11
申请号:US18170104
申请日:2023-02-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung Bin Chun , Jin Bum Kim , Dong Suk Shin , Gyeom Kim , Da Hye Kim
IPC: H01L29/775 , H01L29/66 , H01L29/423 , H01L29/08
CPC classification number: H01L29/775 , H01L29/66439 , H01L29/66742 , H01L29/42392 , H01L29/0847
Abstract: A semiconductor device includes a lower pattern on a substrate and protruding in a first direction, a source/drain pattern on the lower pattern and including a semiconductor liner film in contact with the lower pattern, and an epitaxial insulating liner extending along at least a portion of a sidewall of the semiconductor liner film, wherein the epitaxial insulating liner is in contact with the semiconductor liner film, wherein the semiconductor liner film includes a first portion, wherein the first portion of the semiconductor liner film includes a first point spaced apart from the lower pattern at a first height, and a second point spaced apart from the lower pattern at a second height, wherein the second height is greater than the first height, wherein a width of the semiconductor liner film in a second direction at the first point is less than a width of the semiconductor liner film in the second direction at the second point, and wherein the epitaxial insulating liner extends along at least a portion of a sidewall of the first portion of the semiconductor liner film.
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公开(公告)号:US20230420519A1
公开(公告)日:2023-12-28
申请号:US18110950
申请日:2023-02-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Da Hye Kim , Gyeom Kim , Jin Bum Kim , Su Jin Jung , Kyung Bin Chun
IPC: H01L29/08 , H01L29/06 , H01L29/161 , H01L29/423 , H01L29/775 , H01L21/02 , H01L29/66
CPC classification number: H01L29/0847 , H01L29/0673 , H01L29/161 , H01L29/42392 , H01L29/775 , H01L21/02532 , H01L29/66545 , H01L29/66439
Abstract: A semiconductor device having improved performance and reliability. The semiconductor device may include a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction. A plurality of gate structures may be on the lower pattern and spaced apart in the first direction, and a source/drain pattern, which may include a semiconductor liner film and a semiconductor filling film on the semiconductor liner film. A liner recess that is defined by an inner surface of the semiconductor liner film may include a plurality of width extension regions, and a width of each width extension region in the first direction may increase and then decreases, as a distance increases in the second direction from an upper surface of the lower pattern.
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