公开(公告)号：US11171211B1

公开(公告)日：2021-11-09

申请号：US16900788

申请日：2020-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong-Hyun Park ,  Zhengping Jiang ,  Hesameddin Ilatikhameneh ,  Woosung Choi ,  Chihak Ahn

IPC: H01L29/10 ,  H01L29/08 ,  H01L21/02 ,  H01L29/04 ,  H01L29/66

Abstract: A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

公开(公告)号：US20230178420A1

公开(公告)日：2023-06-08

申请号：US17679465

申请日：2022-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ming He ,  JaeHyun Park ,  Chihak Ahn ,  Mehdi Saremi ,  Rebecca Park ,  Harsono Simka ,  Daewon Ha

IPC: H01L21/762 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L21/76283 ,  H01L29/42392 ,  H01L29/78696 ,  H01L29/0665 ,  H01L29/6653

Abstract: Methods of forming transistor devices are provided. A method of forming a transistor device includes providing a nanosheet stack that includes a plurality of nanosheets on a substrate. A sacrificial layer is between the nanosheet stack and the substrate. The method includes removing the sacrificial layer to form an opening between the nanosheet stack and the substrate. The method includes forming a gate spacer and an isolation region by forming an insulating material on the nanosheet stack and in the opening, respectively. Related transistor devices are also provided.

公开(公告)号：US20210351270A1

公开(公告)日：2021-11-11

申请号：US16900788

申请日：2020-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong-Hyun Park ,  Zhengping Jiang ,  Hesameddin Ilatikhameneh ,  Woosung Choi ,  Chihak Ahn

IPC: H01L29/10 ,  H01L29/08 ,  H01L21/02 ,  H01L29/04 ,  H01L29/423 ,  H01L29/78

Abstract: A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

公开(公告)号：US20190155971A1

公开(公告)日：2019-05-23

申请号：US15875916

申请日：2018-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chihak Ahn ,  Woosung Choi

IPC: G06F17/50

Abstract: A system and method for calculating stress in a device includes receiving an analytic solution domain and calculating initial analytic values for displacement and stress for a dislocation in the domain and creating a stress profile using the initial displacement and the initial stress as initial values of a stress equilibration equation.