公开(公告)号：US20240324183A1

公开(公告)日：2024-09-26

申请号：US18489034

申请日：2023-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanhoon Park ,  Jongkyu Kim ,  Seunghoon Kim ,  Sohyun Park ,  Woohyun Lee

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/02 ,  H10B12/315 ,  H10B12/485

Abstract: An integrated circuit device includes a substrate having an active area, a plurality of bit line structures on the substrate, the plurality of bit line structures including insulating spacers on sidewalls thereof, a buried contact between the plurality of bit line structures and electrically connected to the active area, an insulation capping pattern on a bit line structure of the plurality of bit line structures, and a landing pad electrically connected to the buried contact, the landing pad arranged to vertically overlap the bit line structure on the insulation capping pattern, wherein an uppermost surface of the landing pad is higher than an uppermost surface of the insulation capping pattern, relative to the substrate.

公开(公告)号：US20230225112A1

公开(公告)日：2023-07-13

申请号：US17949356

申请日：2022-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younglim Park ,  Jimin Chae ,  Chanhoon Park ,  Dongmin Shin ,  Jaesoon Lim ,  Intak Jeon

IPC: H01L27/108 ,  H01L49/02

CPC classification number: H01L27/10814 ,  H01L27/10852 ,  H01L28/75 ,  H01L28/91

Abstract: A semiconductor device including a substrate, lower electrodes disposed on the substrate, at least one support layer in contact with the lower electrodes, a dielectric layer disposed on the lower electrodes, an upper electrode disposed on the dielectric layer, a first interfacial film between the lower electrodes and the dielectric layer, and a second interfacial film between the upper electrode and the dielectric layer. At least one of the first and second interfacial films includes a plurality of layers, wherein the plurality of layers include a first metal element, and a second metal element, and at least one of oxygen \and nitrogen. The lower electrodes include the first metal element. A first region of the first interfacial film includes the second metal element at a first concentration and a second region of the first interfacial film includes the second metal element at a second concentration different from the first concentration.

公开(公告)号：US10892142B2

公开(公告)日：2021-01-12

申请号：US16182737

申请日：2018-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjean Jeon ,  Jinyoung Park ,  Chanhoon Park ,  Hoyong Park ,  Jin Young Bang ,  JungHwan Um ,  Il Sup Choi ,  Je-Woo Han

IPC: H01J37/32 ,  H01L21/683

Abstract: A system for fabricating a semiconductor device may include a chamber, an electrostatic chuck used to load a substrate, a power source supplying an RF power to the electrostatic chuck, an impedance matcher between the power source and the electrostatic chuck, and a power transmission unit connecting the electrostatic chuck to the impedance matcher. The power transmission unit may include a power rod, which is connected to the electrostatic chuck and has a first outer diameter, and a coaxial cable. The coaxial cable may include an inner wire, an outer wire, and a dielectric material between the outer and inner wires. The inner wire connects the power rod to the impedance matcher and has a second outer diameter less than the first outer diameter. The outer wire is connected to the chamber and is provided to enclose the inner wire and has a first inner diameter less than the first outer diameter and greater than the second outer diameter. A ratio of the first inner diameter to the second outer diameter is greater than a dielectric constant of the dielectric material and less than three times the dielectric constant of the dielectric material.