公开(公告)号：US10950602B2

公开(公告)日：2021-03-16

申请号：US16401362

申请日：2019-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H01L29/76 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

公开(公告)号：US12284827B2

公开(公告)日：2025-04-22

申请号：US18473412

申请日：2023-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H10D84/83 ,  H01L21/762 ,  H10D84/01 ,  H10D84/03

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

公开(公告)号：US11804483B2

公开(公告)日：2023-10-31

申请号：US17177824

申请日：2021-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L27/0886 ,  H01L21/76224 ,  H01L21/823481

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

公开(公告)号：US20200098751A1

公开(公告)日：2020-03-26

申请号：US16401362

申请日：2019-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8234

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

公开(公告)号：US20240014209A1

公开(公告)日：2024-01-11

申请号：US18473412

申请日：2023-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0642 ,  H01L29/785 ,  H01L29/66545

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

公开(公告)号：US20210193656A1

公开(公告)日：2021-06-24

申请号：US17177824

申请日：2021-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyu-Hwan Ahn ,  Sung-Soo Kim ,  Chae-Ho Na ,  Dong-Hyun Roh ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.