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公开(公告)号:US20240234431A1
公开(公告)日:2024-07-11
申请号:US18610416
申请日:2024-03-20
Applicant: Samsung Display Co., LTD.
Inventor: Hyung Jun KIM , So Young KOO , Eok Su KIM , Yun Yong NAM , Jun Hyung LIM , Kyung Jin JEON
IPC: H01L27/12 , H01L29/786 , H10K59/12
CPC classification number: H01L27/1225 , H01L29/7869 , H01L29/78696 , H10K59/1201
Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.
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公开(公告)号:US20230380228A1
公开(公告)日:2023-11-23
申请号:US18113200
申请日:2023-02-23
Applicant: Samsung Display Co., LTD.
Inventor: Hyung Jun KIM , Eok Su KIM , Hyoung Do KIM , Yun Yong NAM , Joon Seok PARK , Jun Hyung LIM
IPC: H10K59/131 , H10K59/12 , H10K59/80
CPC classification number: H10K59/131 , H10K59/1201 , H10K59/873
Abstract: A display device including a first substrate including a display area, and a non-display area, a second substrate on the first substrate, and a sealing member in a sealing area of the non-display area. The first substrate includes a first base portion, a first conductive layer including a first signal line and a lower light blocking layer, on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping the lower light blocking layer, on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including second and third signal lines electrically connected to the first signal line, and a gate electrode overlapping the semiconductor layer, on the gate insulating layer. In plan view, the first signal line is between the second signal line and the third signal line. The first signal line overlaps the sealing member.
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公开(公告)号:US20220140000A1
公开(公告)日:2022-05-05
申请号:US17471679
申请日:2021-09-10
Applicant: Samsung Display Co., LTD.
Inventor: Hyung Jun KIM , So Young KOO , Eok Su KIM , Yun Yong NAM , Jun Hyung LIM , Kyung Jin JEON
Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.
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公开(公告)号:US20210320162A1
公开(公告)日:2021-10-14
申请号:US17107638
申请日:2020-11-30
Applicant: Samsung Display Co., LTD.
Inventor: Kyung Jin JEON , So Young KOO , Eok Su KIM , Hyung Jun KIM , Jun Hyung LIM
IPC: H01L27/32
Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.
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公开(公告)号:US20210020110A1
公开(公告)日:2021-01-21
申请号:US16846195
申请日:2020-04-10
Applicant: Samsung Display Co., Ltd.
Inventor: Joon Seok PARK , So Young KOO , Myoung Hwa KIM , Eok Su KIM , Tae Sang KIM , Hyung Jun KIM , Yeon Keon MOON , Geun Chul PARK , Jun Hyung LIM , Kyung Jin JEON , Hye Lim CHOI
IPC: G09G3/3266 , G09G3/3233 , G09G3/3291 , H01L27/32 , H01L29/786 , H01L29/49
Abstract: A display device, includes: a pixel connected to a scan line and a data line crossing the scan line, wherein the pixel includes a light emitting element, a driving transistor configured to control a driving current supplied to the light emitting element according to a data voltage received from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal applied to the scan line; wherein the driving transistor includes a first active layer including an oxide semiconductor and a first oxide layer on the first active layer and including an oxide semiconductor; and wherein the first switching transistor includes a second active layer on the first active layer and including the same oxide semiconductor as the first oxide layer.
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公开(公告)号:US20170110591A1
公开(公告)日:2017-04-20
申请号:US15246366
申请日:2016-08-24
Applicant: Samsung Display Co., Ltd.
Inventor: Seok Hwan BANG , Sook-Hwan BAN , Hyung Jun KIM , Woo Geun LEE , Hyeon Jun LEE
IPC: H01L29/786 , H01L27/12
CPC classification number: H01L29/7869 , G02F1/136286 , G02F1/1368 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1262 , H01L27/3248 , H01L27/3276 , H01L29/41733 , H01L29/45 , H01L29/458 , H01L29/66765 , H01L29/66969 , H01L29/786 , H01L29/78618 , H01L29/78696
Abstract: One or more exemplary embodiments disclose a thin film transistor array panel and a manufacturing method thereof including a substrate, a gate line on the substrate, the gate line including a gate electrode, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, and the semiconductor layer including an oxide semiconductor, a data wire layer above the semiconductor layer, the data wire layer including a data line, a source electrode coupled to the data line, and a drain electrode facing the source electrode, and a metal phosphorus oxide layer configured to cover the source electrode and the drain electrode.
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公开(公告)号:US20250089475A1
公开(公告)日:2025-03-13
申请号:US18635753
申请日:2024-04-15
Applicant: Samsung Display Co., LTD.
Inventor: Geun Chul PARK , So Young KOO , Jong Do KEUM , Eok Su KIM , Hyung Jun KIM , Joon Seok PARK , Ae Ran SONG
IPC: H10K59/124 , H01L27/12 , H10K59/12
Abstract: A display device includes a substrate, a first transistor including a first active layer disposed on the substrate and a first gate electrode disposed on the first active layer, and a first gate insulating layer disposed between the first active layer and the first gate electrode. The first active layer includes an oxide semiconductor containing indium (In) at a content range of about 40 at % to about 54 at %, and the first gate insulating layer has an emission amount range of oxygen (O2) of about 2.48E+19 Molec./cm3 to about 2.76E+19 Molec./cm3, or an emission amount range of nitrogen monoxide (NO) of about 1.04E+20 Molec./cm3 to about 1.15E+20 Molec./cm3 under heat treatment conditions performed at a temperature range of about 50° C. to about 550° C.
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公开(公告)号:US20250078767A1
公开(公告)日:2025-03-06
申请号:US18598522
申请日:2024-03-07
Applicant: Samsung Display Co., Ltd.
Inventor: Eok Su KIM , Jong Do KEUM , Hyung Jun KIM
IPC: G09G3/3266 , G09G3/36
Abstract: A gate driver according to embodiments of the present inventive concept includes a plurality of stages arranged in a first direction to output scan signals, clock signal lines supplying clock signals to the stages, power source signal lines supplying power sources to the stages, a start signal line that does not intersect the clock signal lines and the power source signal lines and supplies a start signal to a first stage among the stages, and an end signal line that does not intersect the clock signal lines, the power source signal lines, and the start signal line and supplies an end signal to a last stage among the stages.
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公开(公告)号:US20240063356A1
公开(公告)日:2024-02-22
申请号:US18342567
申请日:2023-06-27
Applicant: Samsung Display Co., LTD.
Inventor: Yun Yong NAM , So Young KOO , Eok Su KIM , Hyoung Do KIM , Hyung Jun KIM , Joon Seok PARK
CPC classification number: H01L33/62 , H01L25/167
Abstract: A display device includes: a first electrode and a second electrode spaced from the first electrode; a first insulating layer on the first electrode and the second electrode; a plurality of light emitting elements on the first insulating layer and on the first electrode and the second electrode; a first connection electrode on the first electrode and contacting the plurality of light emitting elements; and a second connection electrode on the second electrode and contacting the plurality of light emitting elements, wherein each of the first electrode and the second electrode includes a first metal layer and a second metal layer on the first metal layer and including a different material from the first metal layer, a thickness of the first metal layer is between 100 Å to 300 Å, and a thickness of each of the first electrode and the second electrode is 2600 Å or less.
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公开(公告)号:US20230299089A1
公开(公告)日:2023-09-21
申请号:US18324949
申请日:2023-05-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yeon Keon MOON , Tae Sang KIM , Joon Seok PARK , Myoung Hwa KIM , Hyung Jun KIM , Sang Woo SOHN , Hye Lim CHOI
IPC: H01L27/12
CPC classification number: H01L27/1237 , H01L27/1255 , H01L27/1259 , H01L27/124 , H01L27/1225
Abstract: A display device includes: a substrate; a first active layer of a first transistor and a second active layer of a second transistor on the substrate; a first gate insulating layer on the first active layer; a first gate electrode on the first gate insulating layer; a second gate insulating layer on the second active layer; and a second gate electrode on the second gate insulating layer, wherein a hydrogen concentration of the first gate insulating layer is lower than a hydrogen concentration of the second gate insulating layer.
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