公开(公告)号：US09767752B2

公开(公告)日：2017-09-19

申请号：US15098078

申请日：2016-04-13

Applicant: Samsung Display Co., Ltd.

Inventor： Kangnam Kim ,  Duc-han Cho ,  Youmee Hyun

IPC: G09G3/36 ,  G11C19/28 ,  G11C19/18

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

Abstract: An n-th driving stage of a gate driving circuit includes a first control transistor being configured to increase a voltage of a first node to a first voltage, a control capacitor having one end connected to the first node, a second control transistor being configured to increase the first voltage of the first node to a second voltage that is higher than the first voltage, a third control transistor being configured to increase a voltage of a second node to a third voltage when being turned on according to the voltage applied to the first node, and an output transistor being configured to output a gate signal of the n-th driving stage when being turned on according to the voltage applied to the second node.

公开(公告)号：US09978327B2

公开(公告)日：2018-05-22

申请号：US14973766

申请日：2015-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-Han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36 ,  G11C19/18 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.

公开(公告)号：US20160210928A1

公开(公告)日：2016-07-21

申请号：US14973766

申请日：2015-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-Han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.

Abstract translation: 门驱动电路包括驱动级。 每个驱动级将每个栅极信号施加到显示面板的每个栅极线。 第k（k是等于或大于2的自然数）驱动级包括第一输出晶体管，电容器以及第一和第二控制晶体管。 第一输出晶体管包括连接到第一节点的控制电极，接收时钟信号的输入电极和输出第k个门信号的输出电极。 电容器连接在第一输出晶体管的输出电极和第一输出晶体管的控制电极之间。 第一控制晶体管将第一控制信号施加到第二节点，以在输出第k个门信号之前控制第一节点的电压。 第二控制晶体管二极管连接在第二节点和第一节点之间。

公开(公告)号：US11367766B2

公开(公告)日：2022-06-21

申请号：US16841189

申请日：2020-04-06

Applicant: Samsung Display Co., LTD.

Inventor： Seokhwan Bang ,  Jong-In Kim ,  Kangnam Kim ,  Woogeun Lee ,  Sung-Hoon Lim ,  Soojung Chae

IPC: H01L27/32 ,  H01L27/12 ,  H01L51/56 ,  H01L29/786 ,  H01L29/49 ,  H01L29/66

Abstract: An organic light emitting diode display device includes a substrate, an active layer disposed on the substrate and including a metal oxide-based semiconductor, a gate electrode disposed on the active layer, an insulating layer disposed on the gate electrode, source and drain electrodes disposed on the insulating layer, a light emitting element on the source and drain electrodes, and a gate insulating layer between the active layer and the gate electrode. The gate insulating layer includes first and second gate insulating layers. The first gate insulating layer directly contacts the active layer and has a first amount of nitrogen. The second gate insulating layer is disposed on the first gate insulating layer and has a second amount of nitrogen that is different from the first amount of nitrogen.

公开(公告)号：US20220101775A1

公开(公告)日：2022-03-31

申请号：US17481591

申请日：2021-09-22

Applicant: Samsung Display Co., Ltd.

Inventor： Junhong NA ,  Kangnam Kim ,  Sung-Hoon Lim ,  Woogeun Lee ,  Kyu-Sik Cho

IPC: G09G3/20

Abstract: A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.

公开(公告)号：US11710442B2

公开(公告)日：2023-07-25

申请号：US17481591

申请日：2021-09-22

Applicant: Samsung Display Co., Ltd.

Inventor： Junhong Na ,  Kangnam Kim ,  Sung-Hoon Lim ,  Woogeun Lee ,  Kyu-Sik Cho

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0275

Abstract: A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.

公开(公告)号：US10347208B2

公开(公告)日：2019-07-09

申请号：US15445025

申请日：2017-02-28

Applicant: Samsung Display Co., Ltd.

Inventor： Noboru Takeuchi ,  Jonghwan Lee ,  Kangnam Kim ,  Beomjun Kim ,  Hongwoo Lee ,  Youmee Hyun

IPC: G09G3/36 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1335

Abstract: A display device with space for accommodating elements of a gate driver in a display area of the display device, the display device including first and second adjacent pixel electrodes, and third and fourth adjacent pixel electrodes; a gate line extending between the first pixel electrode and the second pixel electrode and between the third pixel electrode and the fourth pixel electrode; a gate driver having a plurality of elements and configured to drive the gate line; and a light blocking layer overlapping the gate line, wherein the light blocking layer comprises a first light blocking portion and a second light blocking portion, the first light blocking portion is adjacent to the first pixel electrode and the second pixel electrode, the second light blocking portion is adjacent to the third pixel electrode and the fourth pixel electrode, the second light blocking portion having a larger size than a size of the first light blocking portion, and at least one of the plurality of elements of the gate driver overlaps the second light blocking portion.

公开(公告)号：US10109252B2

公开(公告)日：2018-10-23

申请号：US15964249

申请日：2018-04-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36 ,  G11C19/18 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.

公开(公告)号：US20180247603A1

公开(公告)日：2018-08-30

申请号：US15964249

申请日：2018-04-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Duc-han Cho ,  Beomjun Kim ,  Yoonho Kim ,  Noboru Takeuchi ,  Kangnam Kim

IPC: G09G3/36 ,  G11C19/28 ,  G11C19/18

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.