公开(公告)号：US11710442B2

公开(公告)日：2023-07-25

申请号：US17481591

申请日：2021-09-22

Applicant: Samsung Display Co., Ltd.

Inventor： Junhong Na ,  Kangnam Kim ,  Sung-Hoon Lim ,  Woogeun Lee ,  Kyu-Sik Cho

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0275

Abstract: A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.