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公开(公告)号:US20190013779A1
公开(公告)日:2019-01-10
申请号:US15641581
申请日:2017-07-05
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Wookang JIN , Sungwon YUN , Chan SON
IPC: H03B5/24
CPC classification number: H03B5/24 , H03B2200/0038 , H03B2200/0048 , H03B2200/0062 , H03B2200/0064 , H03B2201/038 , H03K3/0231
Abstract: An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator.
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公开(公告)号:US20220014016A1
公开(公告)日:2022-01-13
申请号:US16948786
申请日:2020-10-01
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Wookang JIN
Abstract: A CMTI circuit includes a first detector that receives one or more output signals from an oscillator and a first enable signal and generates a first detection signal when the received output signals are determined to be substantially not oscillating at a first time. The CMTI circuit further includes a first activation signal generator that generates a first activation signal in response to the first detection signal to resume oscillation of the output signals.
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公开(公告)号:US20190149137A1
公开(公告)日:2019-05-16
申请号:US15813279
申请日:2017-11-15
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Wookang JIN , Sungwon YUN , Youngmo YANG
Abstract: An oscillator for a pulse width modulation (PWM) controller includes an oscillation circuit including a capacitor and configured to generate a first pulse signal by charging and discharging the capacitor, a frequency divider configured to generate a second pulse signal based on the first pulse signal, the second pulse signal having a lower frequency than the first pulse signal, and an oscillation control circuit coupled to the oscillation circuit and the frequency divider and configured to generate control signals for holding the charging and discharging of the capacitor during an oscillation holding operation.
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