公开(公告)号：US20250055472A1

公开(公告)日：2025-02-13

申请号：US18799138

申请日：2024-08-09

Applicant: Renesas Electronics Corporation

Inventor： Tomohiko EBATA ,  Tetsuo MATSUI

IPC: H03M1/46 ,  H03M1/12 ,  H03M1/14

Abstract: A semiconductor device is provided. The semiconductor device is capable of operating accurately by suppressing errors caused by dielectric relaxation phenomena. The semiconductor device includes a first capacitive element, a signal cancellation circuit, a sampling circuit, a negative feedback circuit, an AD converter, and an addition-and-subtraction circuit.

公开(公告)号：US20180302102A1

公开(公告)日：2018-10-18

申请号：US15900598

申请日：2018-02-20

Applicant: Renesas Electronics Corporation

Inventor： Takashi OSHIMA ,  Tetsuo MATSUI ,  Mitsuya FUKAZAWA ,  Tomohiko YANO

IPC: H03M3/00 ,  H03H21/00 ,  G01S13/02 ,  G01S7/35

CPC classification number: H03M3/414 ,  G01S7/354 ,  G01S13/0209 ,  H03H21/0012 ,  H03M3/38 ,  H03M3/388 ,  H03M3/458

Abstract: A modulator includes an analog integrator including an analog circuit and a quantizer quantizing its output signal. An external input signal is input thereto. A modulator is coupled to the latter stage of the modulator, and includes a quantizer. A probe signal generation circuit injects a probe signal to the modulator. An adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with a probe signal. Another adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with the probe signal. A noise cancel circuit cancels a quantization error generated by the quantizer using search results of the adaptive filters.

公开(公告)号：US20250007529A1

公开(公告)日：2025-01-02

申请号：US18753046

申请日：2024-06-25

Applicant: Renesas Electronics Corporation

Inventor： Tetsuo MATSUI ,  Atsushi TANGODA ,  Keisaku SENTO ,  Masaki FUJIWARA

IPC: H03M1/08

Abstract: A semiconductor device capable of operating accurately while suppressing the propagation of interference noise, a control method for the semiconductor device, and a control program are provided. The semiconductor device includes a first AD converter of a charge redistribution type sequential comparison type that includes a redundant comparison operation in a sequential comparison operation and outputs a first input signal of an analog differential using a reference voltage to a first output signal of digital, a first pin to which the reference voltage is supplied from the outside, a first variable impedance circuit provided on a signal line between the first AD converter and capable of changing impedance, and a first control circuit 10 that controls the impedance of the first variable impedance circuit according to the operating condition of the first AD converter.

公开(公告)号：US20200212925A1

公开(公告)日：2020-07-02

申请号：US16717070

申请日：2019-12-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tetsuo MATSUI ,  Keisaku SENTO ,  Tomohiko EBATA

IPC: H03M1/46 ,  H03M1/12

Abstract: A conventional analog-to-digital conversion circuit has a problem that conversion errors cannot be suppressed. According to one embodiment, the analog-to-digital conversion circuit includes a first digital-to-analog conversion circuit 30 of a capacitance distribution type, a second digital-to-analog conversion circuit 31 of a capacitance distribution type, and a comparison circuit 32 for comparing output voltages of the two digital-to-analog conversion circuits, and before performing a successive comparison operation for successively changing a reference voltage applied to the first digital-to-analog conversion circuit, generates an intermediate digital value having a digital value corresponding to a voltage value of an analog input signal, determines a reference voltage to be applied to the second digital-to-analog conversion circuit 31 in accordance with the intermediate digital value, and thereafter performs a successive comparison operation using the first digital-to-analog conversion circuit 30 in a state in which the state of the second digital-to-analog conversion circuit 31 is held.

公开(公告)号：US20250055471A1

公开(公告)日：2025-02-13

申请号：US18798978

申请日：2024-08-09

Applicant: Renesas Electronics Corporation

Inventor： Tomohiko EBATA ,  Tetsuo MATSUI

IPC: H03M1/46 ,  H03M1/12

Abstract: A semiconductor device is provided. The semiconductor device is capable of operating accurately by suppressing errors caused by dielectric relaxation phenomena. The semiconductor device includes a first capacitive element, a first switch circuit, a first inversion signal generating circuit, a second capacitive element, and a negative feedback circuit.

公开(公告)号：US20200166606A1

公开(公告)日：2020-05-28

申请号：US16585924

申请日：2019-09-27

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takashi OSHIMA ,  Tetsuo MATSUI ,  Mitsuya FUKAZAWA ,  Katsuki TATEYAMA ,  Masaki FUJIWARA

IPC: G01S7/35 ,  H03M3/00 ,  G01S13/34

Abstract: A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.