公开(公告)号：US20250007529A1

公开(公告)日：2025-01-02

申请号：US18753046

申请日：2024-06-25

Applicant: Renesas Electronics Corporation

Inventor： Tetsuo MATSUI ,  Atsushi TANGODA ,  Keisaku SENTO ,  Masaki FUJIWARA

IPC: H03M1/08

Abstract: A semiconductor device capable of operating accurately while suppressing the propagation of interference noise, a control method for the semiconductor device, and a control program are provided. The semiconductor device includes a first AD converter of a charge redistribution type sequential comparison type that includes a redundant comparison operation in a sequential comparison operation and outputs a first input signal of an analog differential using a reference voltage to a first output signal of digital, a first pin to which the reference voltage is supplied from the outside, a first variable impedance circuit provided on a signal line between the first AD converter and capable of changing impedance, and a first control circuit 10 that controls the impedance of the first variable impedance circuit according to the operating condition of the first AD converter.

公开(公告)号：US20200212925A1

公开(公告)日：2020-07-02

申请号：US16717070

申请日：2019-12-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tetsuo MATSUI ,  Keisaku SENTO ,  Tomohiko EBATA

IPC: H03M1/46 ,  H03M1/12

Abstract: A conventional analog-to-digital conversion circuit has a problem that conversion errors cannot be suppressed. According to one embodiment, the analog-to-digital conversion circuit includes a first digital-to-analog conversion circuit 30 of a capacitance distribution type, a second digital-to-analog conversion circuit 31 of a capacitance distribution type, and a comparison circuit 32 for comparing output voltages of the two digital-to-analog conversion circuits, and before performing a successive comparison operation for successively changing a reference voltage applied to the first digital-to-analog conversion circuit, generates an intermediate digital value having a digital value corresponding to a voltage value of an analog input signal, determines a reference voltage to be applied to the second digital-to-analog conversion circuit 31 in accordance with the intermediate digital value, and thereafter performs a successive comparison operation using the first digital-to-analog conversion circuit 30 in a state in which the state of the second digital-to-analog conversion circuit 31 is held.