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    Universal coherent technique generator
    1.
    发明授权
    Universal coherent technique generator 有权

    公开(公告)号：US10473758B2

    公开(公告)日：2019-11-12

    申请号：US15091988

    申请日：2016-04-06

    Applicant: Raytheon Company

    Inventor： Jeffrey Caldwell ,  Harry B. Marr, Jr. ,  Ian S. Robinson

    IPC: G01S7/38

    Abstract: Devices and methods of providing response pulses in response to threat pulses are general described. The threat pulses are detected, identified and validity determined using reprogrammable firmware. Threat pulses are extracted from memory and the amplitude, frequency, phase, length and timing modified to generate a coherent set of superposed response pulses in response to the threat pulses. The modifications are calculated in situ using parameterization, rather than being based on tables. Multiple response pulses in response to different threat pulses are simultaneously generated, combined and transmitted in a single channel. Partial pulse capability and the capability to create a weighted and modulated composition of multiple response pulses is provided.

    System and method for adaptive simultaneous transmit and receive leakage cancellation
    2.
    发明授权
    System and method for adaptive simultaneous transmit and receive leakage cancellation 有权

    公开(公告)号：US10393859B2

    公开(公告)日：2019-08-27

    申请号：US15295084

    申请日：2016-10-17

    Applicant: RAYTHEON COMPANY

    Inventor： Harry B. Marr ,  John P. Gianvittorio ,  Jeffrey Caldwell ,  Samuel E. Parker ,  John Cangeme

    IPC: G01S7/02 ,  G01S7/03 ,  G01S7/35 ,  G01S7/292

    Abstract: Method and apparatus for leakage signal cancellation in a simultaneous transmit and receive RF system includes: generating a digital transmit signal for transmission from the system; receiving a receive signal produced by reflection of the transmit signal from an object or generated by a second RF system; adaptively filtering the transmit signal by an adaptive finite input response (FIR) filter; calculating filter coefficients for the adaptive FIR filter in real-time at a different sampling rate; adaptively inputting the calculated filter coefficients to the adaptive FIR filter to generate a cancellation signal in real-time; and applying the cancellation signal to the receive signal to cancel leakage in the receive signal to generate an optimum receive signal.

    Method and apparatus of digital beamforming for a radar system
    6.
    发明授权
    Method and apparatus of digital beamforming for a radar system 有权

    公开(公告)号：US10698083B2

    公开(公告)日：2020-06-30

    申请号：US15686630

    申请日：2017-08-25

    Applicant: Raytheon Company

    Inventor： Daniel Thompson ,  Harry B. Marr ,  Ian Robinson ,  Jeffrey Caldwell

    IPC: G01S7/03 ,  H01Q3/26 ,  G01S7/40 ,  G01S13/02

    Abstract: A system and method of digital beamforming for a monobit phased array radar system includes providing a plurality of monobit analog signals received by at least one antenna to at least one field programmable gate array (FPGA). A plurality of monobit SerDes transceivers within the FPGA convert the plurality of monobit analog signals into a plurality of multibit digital signals, each of the multibit digital signals being modified according to a digital signal conditioning value to calibrate, phase align, and synchronize the digital signals. A digital beam is formed by coherently combining the plurality of digital signals within the FPGA.

    METHOD AND APPARATUS OF DIGITAL BEAMFORMING FOR A RADAR SYSTEM
    7.
    发明申请
    METHOD AND APPARATUS OF DIGITAL BEAMFORMING FOR A RADAR SYSTEM 审中-公开

    公开(公告)号：US20190067814A1

    公开(公告)日：2019-02-28

    申请号：US15686630

    申请日：2017-08-25

    Applicant: Raytheon Company

    Inventor： Daniel Thompson ,  Harry B. Marr ,  Ian Robinson ,  Jeffrey Caldwell

    IPC: H01Q3/38 ,  H01Q21/22 ,  G01S13/02

    Abstract: A system and method of digital beamforming for a monobit phased array radar system includes providing a plurality of monobit analog signals received by at least one antenna to at least one field programmable gate array (FPGA). A plurality of monobit SerDes transceivers within the FPGA convert the plurality of monobit analog signals into a plurality of multibit digital signals, each of the multibit digital signals being modified according to a digital signal conditioning value to calibrate, phase align, and synchronize the digital signals. A digital beam is formed by coherently combining the plurality of digital signals within the FPGA.

    UNIVERSAL COHERENT TECHNIQUE GENERATOR
    8.
    发明申请
    UNIVERSAL COHERENT TECHNIQUE GENERATOR 审中-公开

    公开(公告)号：US20170293019A1

    公开(公告)日：2017-10-12

    申请号：US15091988

    申请日：2016-04-06

    Applicant: Raytheon Company

    Inventor： Jeffrey Caldwell ,  Harry B. Marr, JR. ,  Ian S. Robinson

    IPC: G01S7/38

    CPC classification number: G01S7/38

    Abstract: Devices and methods of providing response pulses in response to threat pulses are general described. The threat pulses are detected, identified and validity determined using reprogrammable firmware. Threat pulses are extracted from memory and the amplitude, frequency, phase, length and timing modified to generate a coherent set of superposed response pulses in response to the threat pulses. The modifications are calculated in situ using parameterization, rather than being based on tables. Multiple response pulses in response to different threat pulses are simultaneously generated, combined and transmitted in a single channel. Partial pulse capability and the capability to create a weighted and modulated composition of multiple response pulses is provided.

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