知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.034 seconds)

    Concurrent relocation and reinitialization of VSLAM
    2.
    发明授权
    Concurrent relocation and reinitialization of VSLAM 有权

    公开(公告)号：US11340615B2

    公开(公告)日：2022-05-24

    申请号：US16641730

    申请日：2017-10-06

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaohui Liu ,  Yibo Jiang ,  Yanming Zou ,  Lei Xu ,  Jiangtao Ren

    IPC: G01C21/20 ,  G05D1/02 ,  G06T7/73

    Abstract: Various embodiments include processing devices and methods for relocation and reinitialization for a robotic device. Various embodiments may include concurrently relocating a second pose of the robotic device and reinitializing a third pose of the robotic device in response to failing to determine a first pose of the robotic device in the environment and determining that tracking of the robotic device is lost. Various embodiments may include pre-relocating a second pose of the robotic device in the environment in response to failing to determine the first pose of the robotic device in the environment and determining that tracking of the robotic device is lost, relocating a third pose of the robotic device in response to successfully pre-relocating the second pose of the robotic device, and reinitializing a fourth pose of the robotic device in response to unsuccessfully pre-relocating the second pose of the robotic device.

    Efficient execution of graph-based programs
    3.
    发明授权
    Efficient execution of graph-based programs 有权
    有效执行基于图表的程序

    公开(公告)号：US09348560B2

    公开(公告)日：2016-05-24

    申请号：US14106539

    申请日：2013-12-13

    Applicant: QUALCOMM Incorporated

    Inventor： Binglong Xie ,  Shuxue Quan ,  Ning Bi ,  Jianfeng Ren ,  Lei Xu ,  Ananthapadmanabhan Arasanipalai Kandhadai

    IPC: G06F9/44 ,  G06F9/50 ,  G06F9/45

    CPC classification number: G06F8/34 ,  G06F8/451 ,  G06F9/50 ,  G06F9/5044 ,  Y02D10/22

    Abstract: A method includes accessing, at a computing device, data descriptive of a graph representing a program. The graph includes multiple nodes representing execution steps of the program and includes multiple edges representing data transfer steps. The method also includes determining at least two heterogeneous hardware resources of the computing device that are available to execute code represented by one or more of the nodes, and determining one or more paths from a source node to a sink node based on a topology of the graph. The method further includes scheduling execution of code at the at least two heterogeneous hardware resources. The code is represented by at least one of the multiple nodes, and the execution of the code is scheduled based on the one or more paths.

    Abstract translation: 一种方法包括在计算设备处访问描述代表节目的图形的数据。 该图包括表示程序的执行步骤的多个节点，并且包括表示数据传送步骤的多个边。 该方法还包括确定可用于执行由一个或多个节点表示的代码的计算设备的至少两个异构硬件资源，以及基于所述节点的拓扑来确定从源节点到汇聚节点的一个或多个路径 图形。 该方法还包括在至少两个异构硬件资源上调度代码的执行。 代码由多个节点中的至少一个表示，并且基于一个或多个路径调度代码的执行。

    SYSTEMS AND METHODS FOR MEMORY UTILIZATION FOR OBJECT DETECTION
    4.
    发明申请
    SYSTEMS AND METHODS FOR MEMORY UTILIZATION FOR OBJECT DETECTION 有权
    用于对象检测的存储器使用的系统和方法

    公开(公告)号：US20150058579A1

    公开(公告)日：2015-02-26

    申请号：US14468208

    申请日：2014-08-25

    Applicant: QUALCOMM Incorporated

    Inventor： Lei Xu ,  Bo Zhou ,  Michael Warren Castelloe ,  Shuxue Quan ,  Xinping Zhang ,  Junchen Du ,  Ashwath Harthattu ,  Feng Guo ,  Yingyong Qi

    IPC: G06F12/08

    CPC classification number: G06F12/0802 ,  G06F2212/60 ,  G06K9/00973

    Abstract: A method for memory utilization by an electronic device is described. The method includes transferring a first portion of a first decision tree and a second portion of a second decision tree from a first memory to a cache memory. The first portion and second portion of each decision tree are stored contiguously in the first memory. The first decision tree and second decision tree are each associated with a different feature of an object detection algorithm. The method also includes reducing cache misses by traversing the first portion of the first decision tree and the second portion of the second decision tree in the cache memory based on an order of execution of the object detection algorithm.

    Abstract translation: 描述了一种由电子设备进行存储器利用的方法。 该方法包括将第一决策树的第一部分和第二决策树的第二部分从第一存储器传送到高速缓冲存储器。 每个决策树的第一部分和第二部分被连续地存储在第一存储器中。 第一决策树和第二决策树各自与对象检测算法的不同特征相关联。 该方法还包括通过基于对象检测算法的执行顺序遍历高速缓冲存储器中的第一决策树的第一部分和第二决策树的第二部分来减少高速缓存未命中。

    Systems and methods for memory utilization for object detection
    6.
    发明授权
    Systems and methods for memory utilization for object detection 有权
    用于对象检测的内存利用的系统和方法

    公开(公告)号：US09286217B2

    公开(公告)日：2016-03-15

    申请号：US14468208

    申请日：2014-08-25

    Applicant: QUALCOMM Incorporated

    Inventor： Lei Xu ,  Bo Zhou ,  Michael Warren Castelloe ,  Shuxue Quan ,  Xinping Zhang ,  Junchen Du ,  Ashwath Harthattu ,  Feng Guo ,  Yingyong Qi

    IPC: G06F12/08 ,  G06K9/00

    CPC classification number: G06F12/0802 ,  G06F2212/60 ,  G06K9/00973

    Abstract: A method for memory utilization by an electronic device is described. The method includes transferring a first portion of a first decision tree and a second portion of a second decision tree from a first memory to a cache memory. The first portion and second portion of each decision tree are stored contiguously in the first memory. The first decision tree and second decision tree are each associated with a different feature of an object detection algorithm. The method also includes reducing cache misses by traversing the first portion of the first decision tree and the second portion of the second decision tree in the cache memory based on an order of execution of the object detection algorithm.

    Abstract translation: 描述了一种由电子设备进行存储器利用的方法。 该方法包括将第一决策树的第一部分和第二决策树的第二部分从第一存储器传送到高速缓冲存储器。 每个决策树的第一部分和第二部分被连续地存储在第一存储器中。 第一决策树和第二决策树各自与对象检测算法的不同特征相关联。 该方法还包括通过基于对象检测算法的执行顺序遍历高速缓冲存储器中的第一决策树的第一部分和第二决策树的第二部分来减少高速缓存未命中。

    Image sensor initialization in a robotic vehicle
    8.
    发明授权
    Image sensor initialization in a robotic vehicle 有权

    公开(公告)号：US11080890B2

    公开(公告)日：2021-08-03

    申请号：US16621392

    申请日：2017-07-28

    Applicant: QUALCOMM Incorporated

    Inventor： Xiaohui Liu ,  Yibo Jiang ,  Lei Xu ,  Jiangtao Ren ,  Yanming Zou

    IPC: G06T7/73 ,  G06T7/60 ,  G05D1/00 ,  G05D1/02 ,  H04N5/232 ,  B60R11/04 ,  B60R11/00

    Abstract: Various embodiments include processing devices and methods for initializing an image sensor of a robotic vehicle. In some embodiments, a processor of the robotic vehicle may extract first features from a captured image of the target image, may extract second features from a predefined image pyramid of the target image, may match first features and second features, and may estimate an image sensor pose based on matched features and known dimensions of the target image. In some embodiments, the processor may estimate an image or to image sensor pose based on matched features and a translation and/or rotation of the robotic vehicle. In some embodiments, the processor may determine a coordinate system for the robotic vehicle based on one or more image sensor poses.

    EFFICIENT EXECUTION OF GRAPH-BASED PROGRAMS
    9.
    发明申请
    EFFICIENT EXECUTION OF GRAPH-BASED PROGRAMS 有权
    基于图表的程序的有效执行

    公开(公告)号：US20140359563A1

    公开(公告)日：2014-12-04

    申请号：US14106539

    申请日：2013-12-13

    Applicant: QUALCOMM Incorporated

    Inventor： Binglong Xie ,  Shuxue Quan ,  Ning Bi ,  Jianfeng Ren ,  Lei Xu ,  Ananthapadmanabhan Arasanipalai Kandhadai

    IPC: G06F9/44 ,  G06F9/50

    CPC classification number: G06F8/34 ,  G06F8/451 ,  G06F9/50 ,  G06F9/5044 ,  Y02D10/22

    Abstract: A method includes accessing, at a computing device, data descriptive of a graph representing a program. The graph includes multiple nodes representing execution steps of the program and includes multiple edges representing data transfer steps. The method also includes determining at least two heterogeneous hardware resources of the computing device that are available to execute code represented by one or more of the nodes, and determining one or more paths from a source node to a sink node based on a topology of the graph. The method further includes scheduling execution of code at the at least two heterogeneous hardware resources. The code is represented by at least one of the multiple nodes, and the execution of the code is scheduled based on the one or more paths.

    Abstract translation: 一种方法包括在计算设备处访问描述代表节目的图形的数据。 该图包括表示程序的执行步骤的多个节点，并且包括表示数据传送步骤的多个边。 该方法还包括确定可用于执行由一个或多个节点表示的代码的计算设备的至少两个异构硬件资源，以及基于所述节点的拓扑来确定从源节点到汇聚节点的一个或多个路径 图形。 该方法还包括在至少两个异构硬件资源上调度代码的执行。 代码由多个节点中的至少一个表示，并且基于一个或多个路径调度代码的执行。

Patent Agency Ranking