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公开(公告)号：US20230299655A1
公开(公告)日：2023-09-21
申请号：US18324694
申请日：2023-05-26
Applicant: Qualcomm Incorporated
Inventor： Kan Li , Guolei Yu , Hua Guan , Todd Robert Sutton
CPC classification number: H02M1/0029 , H02M3/158 , H02M1/08
Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.
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公开(公告)号：US20180284830A1
公开(公告)日：2018-10-04
申请号：US15713215
申请日：2017-09-22
Applicant: Qualcomm Incorporated
Inventor： Chi Fan Yung , Xiaodan Zou , Ngai Yeung Ho , Hua Guan , Kan Li
Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.
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公开(公告)号：US12166417B2
公开(公告)日：2024-12-10
申请号：US17554991
申请日：2021-12-17
Applicant: QUALCOMM Incorporated
Inventor： Jize Jiang , Hua Guan
Abstract: A power supply circuit and techniques for voltage regulation are described. Certain aspects provide a method of supplying power by a power supply circuit. The method generally includes: generating an output voltage based on a voltage at a Vin node via a first transistor having a gate coupled to a gate of a second transistor, wherein a source of the second transistor is coupled to the Vin node and wherein a drain of the second transistor is coupled a drain of a third transistor; and sourcing a current to the third transistor, wherein during a light load condition of the power supply circuit, the current varies based on the voltage at a Vout node of the power supply circuit, and during a heavy load condition of the power supply circuit, the current is limited based on a current threshold.
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公开(公告)号：US09933801B1
公开(公告)日：2018-04-03
申请号：US15473504
申请日：2017-03-29
Applicant: QUALCOMM Incorporated
Inventor： Hua Guan , Ngai Yeung Ho , Mengmeng Du
CPC classification number: G05F1/575
Abstract: A voltage regulator may include an auxiliary power device having a first terminal coupled to a control line, a second terminal coupled to an input voltage and a third terminal coupled to an output voltage pad. The voltage regulator may also include a main power device electrically coupled in parallel with the auxiliary power device. A second terminal of the main power device may be coupled to the input voltage, and a third terminal of the main power device may be coupled to the output voltage pad. The voltage regulator may further include a switching system selectively coupling the main power device into and out of the voltage regulator.
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公开(公告)号：US09588541B1
公开(公告)日：2017-03-07
申请号：US14928703
申请日：2015-10-30
Applicant: QUALCOMM Incorporated
Inventor： Ngai Yeung Ho , Hua Guan
IPC: G05F3/26
Abstract: The embodiments described herein relate to an improved regulator circuit technique having a dual-loop configuration with a current regulation loop to provide the transient response and a voltage regulation loop to provide accurate DC voltage regulation. The current regulation loop comprises a pass transistor, a current sensing transistor, a current summation circuit, and a series of current mirrors to provide a fast load transient response current. The voltage regulation loop includes an output voltage feedback network, an error amplifier, a compensation capacitor, and the current sensing transistor and is configured to provide accurate DC offset regulation to diminish output voltage errors introduced by the transient load currents.
Abstract translation: 本文描述的实施例涉及一种改进的调节器电路技术，其具有具有电流调节环路以提供瞬态响应的双回路配置和电压调节环路，以提供精确的直流电压调节。 电流调节回路包括传输晶体管，电流检测晶体管，电流求和电路和一系列电流镜，以提供快速负载瞬态响应电流。 电压调节回路包括输出电压反馈网络，误差放大器，补偿电容器和电流感测晶体管，并且被配置为提供精确的DC偏移调整以减少由瞬态负载电流引入的输出电压误差。
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Patent Agency Ranking
公开(公告)号：US20170017250A1
公开(公告)日：2017-01-19
申请号：US14800375
申请日：2015-07-15
Applicant: QUALCOMM Incorporated
Inventor： Vincenzo F. Peluso , Liangguo Shen , Hua Guan , Mengmeng Du , Ngai Yeung Ho
IPC: G05F1/575
Abstract: In one embodiment, the present disclosure includes a low drop-out regulator circuit comprising a pass transistor providing an output voltage on an output terminal in response to a gate voltage on a gate of the pass transistor. A feedback circuit is coupled to the output terminal to generate a feedback voltage, and an error amplifier provides a drive signal in response to a reference voltage and the feedback voltage. A first gate driver circuit is operable over a first voltage range to provide the gate voltage to the pass transistor in response to the drive signal. A second gate driver circuit is operable over a second voltage range to provide the gate voltage to the pass transistor in response to the drive signal, where the second voltage range is lower than the first voltage range.
Abstract translation: 在一个实施例中，本公开包括一个低压差稳压器电路，其包括传递晶体管，其响应于传输晶体管的栅极上的栅极电压在输出端子上提供输出电压。 反馈电路耦合到输出端以产生反馈电压，并且误差放大器响应于参考电压和反馈电压提供驱动信号。 第一栅极驱动器电路可在第一电压范围上操作，以响应于驱动信号向栅极电压提供栅极电压。 第二栅极驱动器电路可在第二电压范围上操作，以响应于第二电压范围低于第一电压范围的驱动信号向传输晶体管提供栅极电压。
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公开(公告)号：US09473122B1
公开(公告)日：2016-10-18
申请号：US14837364
申请日：2015-08-27
Applicant: QUALCOMM Incorporated
Inventor： Liangguo Shen , Chunlei Shi , Hua Guan
CPC classification number: G05F3/262 , H03F3/45183 , H03F3/45246 , H03F3/45708 , H03F2203/45288 , H03F2203/45481
Abstract: Embodiments described herein relate to an improved circuit technique in a rail-to-rail input stage circuit utilizing non-complementary differential pairs with bias control designed to maintain a constant transconductance “gm” throughout an input common mode voltage range. The rail-to-rail input stage circuit comprises a first differential pair circuit, a level-shifted differential pair circuit coupled with the first differential pair circuit, and a constant transconductance generation circuit coupled with the level-shifted differential pair circuit. The constant transconductance generation circuit is configured to control the bias current conducting in the level-shifted differential pair circuit based on current conducting in the first differential pair circuit to maintain a constant transconductance in the rail-to-rail input stage circuit.
Abstract translation: 本文所描述的实施例涉及一种利用具有偏置控制的非互补差分对的轨至轨输入级电路中的改进的电路技术，其设计成在整个输入共模电压范围内保持恒定的跨导“gm”。 轨到轨输入级电路包括第一差分对电路，与第一差分对电路耦合的电平移位差分对电路，以及与电平移位差分对电路耦合的恒定跨导产生电路。 恒定跨导产生电路被配置为基于第一差分对电路中的电流导通来控制电平移位的差分对电路中的导通的偏置电流，以在轨至轨输入级电路中保持恒定的跨导。
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公开(公告)号：US11959962B2
公开(公告)日：2024-04-16
申请号：US17808357
申请日：2022-06-23
Applicant: QUALCOMM Incorporated
Inventor： Chengyue Yu , Hua Guan , Yingjie Chen , Fan Yang , Yufei Pan , Jize Jiang , Shamim Ahmed
IPC: G01R31/28
CPC classification number: G01R31/2896 , G01R31/2853 , G01R31/2891
Abstract: Apparatus and techniques for an integrated circuit (IC) package to automatically detect, through an input/out pin, external component parameters and parasitics. An example IC package generally includes a pin for coupling to a component external to the IC package, and at least one of a resistance detector, an inductance detector, or a capacitance detector coupled to the pin, and configured to detect at least one of a resistance, an inductance, or a capacitance, respectively, of a lumped parameter model for the component external to the IC package. The resistance detector, inductance detector, or capacitance detector may also be configured to detect parasitics associated with at least one of the component, the pin, or a connection between the component and the pin.
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公开(公告)号：US11687104B2
公开(公告)日：2023-06-27
申请号：US17213044
申请日：2021-03-25
Applicant: QUALCOMM Incorporated
Inventor： Kuan Chuang Koay , Hua Guan , Jize Jiang
Abstract: In certain aspects, a system includes an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to a gate of a pass transistor of a low dropout (LDO) regulator. The system also includes a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the input of the amplifying circuit.
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公开(公告)号：US10216208B2
公开(公告)日：2019-02-26
申请号：US14837308
申请日：2015-08-27
Applicant: QUALCOMM Incorporated
Inventor： Vincenzo Peluso , Hua Guan
Abstract: A voltage regulator having current sense capability may include an input node and an output node. A first output device may be electrically connected between the input node and the output node, and configured to control current flow through the first output device to regulate a voltage at the output node. A current sense circuit may be configured to produce a signal that is indicative of the current through the first output device. The current sense circuit may be configured to perform a first kind of offset compensation operation to reduce an offset voltage in an error amplifier of the current sense circuit, and to perform a second kind of offset compensation operation to reduce the offset voltage in the error amplifier.
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