公开(公告)号：US20170286674A1

公开(公告)日：2017-10-05

申请号：US15087198

申请日：2016-03-31

Applicant: QUALCOMM Incorporated

Inventor： Sudha Anil Kumar Gathala ,  Gheorghe Calin Cascaval ,  Rajarshi Gupta

IPC: G06F21/55 ,  G06F12/10 ,  G06F3/06 ,  G06F17/30

CPC classification number: G06F21/554 ,  G06F3/0623 ,  G06F3/0631 ,  G06F3/0653 ,  G06F3/0683 ,  G06F12/1009 ,  G06F17/30138 ,  G06F17/30233 ,  G06F21/52

Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for time varying address space layout randomization. The apparatus may launch first plurality of versions of a system service and assign a random virtual address space layout to each of the first plurality of versions of the system service. The apparatus may receive a first request to execute the system service from a first application. The apparatus may randomly select a first version of the system service from the first plurality of versions of the system service, and execute the system service using data of the first version of the system service.

公开(公告)号：US09740504B2

公开(公告)日：2017-08-22

申请号：US14262871

申请日：2014-04-28

Applicant: QUALCOMM Incorporated

Inventor： Behnam Robatmili ,  Gheorghe Calin Cascaval ,  Madhukar Nagaraja Kedlaya ,  Dario Suarez Gracia

IPC: G06F9/44 ,  G06F12/08 ,  G06F12/0802

CPC classification number: G06F9/4491 ,  G06F12/0802

Abstract: Aspects include apparatuses, systems, and methods for hardware acceleration for inline caches in dynamic languages. An inline cache may be initialized for an instance of a dynamic software operation. A call of an initialized instance of the dynamic software operation may be executed by an inline cache hardware accelerator. The inline cache may be checked to determine that its data is current. When the data is current, the initialized instance of the dynamic software operation may be executed using the related inline cache data. When the data is not current, a new inline cache may be initialized for the instance of the dynamic software operation, including the not current data of a previously initialized instance of the dynamic software operation. The inline cache hardware accelerator may include an inline cache memory, a coprocessor, and/or a functional until one an inline cache pipeline connected to a processor pipeline.

公开(公告)号：US09092327B2

公开(公告)日：2015-07-28

申请号：US13781366

申请日：2013-02-28

Applicant: QUALCOMM Incorporated

Inventor： Subrato K. De ,  Richard A. Stewart ,  Gheorghe Calin Cascaval ,  Dexter T. Chun

IPC: G06F12/00 ,  G11C7/00 ,  G06F12/06 ,  G11C7/10

CPC classification number: G06F12/023 ,  G06F12/0607 ,  G06F12/0638 ,  G06F2212/1044 ,  G11C7/1072 ,  Y02D10/13

Abstract: Systems and methods are provided for allocating memory to dissimilar memory devices. An exemplary embodiment includes a method for allocating memory to dissimilar memory devices. An interleave bandwidth ratio is determined, which comprises a ratio of bandwidths for two or more dissimilar memory devices. The dissimilar memory devices are interleaved according to the interleave bandwidth ratio to define two or more memory zones having different performance levels. Memory address requests are allocated to the memory zones based on a quality of service (QoS).

Abstract translation: 提供了系统和方法，用于将存储器分配给不同的存储器件。 示例性实施例包括用于将不同的存储器件分配存储器的方法。 确定交织带宽比，其包括两个或多个不同存储器件的带宽比。 不同的存储器件根据交织带宽比进行交织以定义具有不同性能级别的两个或多个存储器区域。 基于服务质量（QoS）将内存地址请求分配给内存区域。

公开(公告)号：US10169105B2

公开(公告)日：2019-01-01

申请号：US14992268

申请日：2016-01-11

Applicant: QUALCOMM Incorporated

Inventor： Han Zhao ,  Pablo Montesinos Ortego ,  Arun Raman ,  Behnam Robatmili ,  Gheorghe Calin Cascaval

IPC: G06F9/46 ,  G06F9/52 ,  G06F9/48

Abstract: Aspects include computing devices, systems, and methods for implementing scheduling and execution of lightweight kernels as simple tasks directly by a thread without setting up a task structure. A computing device may determine whether a task pointer in a task queue is a simple task pointer for the lightweight kernel. The computing device may schedule a first simple task for the lightweight kernel for execution by the thread. The computing device may retrieve, from an entry of a simple task table, a kernel pointer for the lightweight kernel. The entry in the simple task table may be associated with the simple task pointer. The computing device may directly execute the lightweight kernel as the simple task.

公开(公告)号：US20170031728A1

公开(公告)日：2017-02-02

申请号：US14992268

申请日：2016-01-11

Applicant: QUALCOMM Incorporated

Inventor： Han Zhao ,  Pablo Montesinos Ortego ,  Arun Raman ,  Behnam Robatmili ,  Gheorghe Calin Cascaval

IPC: G06F9/52

CPC classification number: G06F9/52 ,  G06F9/4843

Abstract: Aspects include computing devices, systems, and methods for implementing scheduling and execution of lightweight kernels as simple tasks directly by a thread without setting up a task structure. A computing device may determine whether a task pointer in a task queue is a simple task pointer for the lightweight kernel. The computing device may schedule a first simple task for the lightweight kernel for execution by the thread. The computing device may retrieve, from an entry of a simple task table, a kernel pointer for the lightweight kernel. The entry in the simple task table may be associated with the simple task pointer. The computing device may directly execute the lightweight kernel as the simple task.

Abstract translation: 方面包括计算设备，系统和方法，用于直接通过线程实现轻量级内核的调度和执行，而无需设置任务结构。 计算设备可以确定任务队列中的任务指针是否是轻量级内核的简单任务指针。 计算设备可以安排轻量级内核的第一简单任务以供线程执行。 计算设备可以从简单任务表的条目中检索轻量级内核的内核指针。 简单任务表中的条目可能与简单任务指针相关联。 计算设备可以直接执行轻量级内核作为简单任务。

公开(公告)号：US20160267005A1

公开(公告)日：2016-09-15

申请号：US14824142

申请日：2015-08-12

Applicant: QUALCOMM Incorporated

Inventor： Aravind Natarajan ,  Gheorghe Calin Cascaval

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F12/0253 ,  G06F3/0608 ,  G06F3/065 ,  G06F3/068 ,  G06F9/5016 ,  G06F9/5022 ,  G06F2212/702

Abstract: Various embodiments include methods for reclaiming memory in a computing device that may include storing a first pointer pointing to a first memory location storing the beginning of a data structure in which a plurality of threads executing on the computing device may concurrently access the data structure and storing a second pointer pointing to the current beginning of the data structure. In response to performing an operation on the data structure that changes the location of the beginning of the data structure from the first memory location to a second memory location, the second pointer may be updated to point to the second memory location. In response to determining that memory allocated to the data structure may be reclaimed, memory allocated to the data structure, including memory located at the first memory location pointed to by the first pointer, may be reclaimed.

Abstract translation: 各种实施例包括用于在计算设备中回收存储器的方法，其可以包括存储指向存储数据结构的开始的第一存储器位置的第一指针，其中在计算设备上执行的多个线程可以并发访问数据结构并存储 指向数据结构的当前开始的第二个指针。 响应于对将数据结构的开始位置从第一存储器位置改变到第二存储器位置的数据结构执行操作，可以更新第二指针以指向第二存储器位置。 响应于确定分配给数据结构的存储器可以被回收，可以回收分配给数据结构的存储器，包括位于第一指针指向的第一存储器位置处的存储器。

公开(公告)号：US20160041852A1

公开(公告)日：2016-02-11

申请号：US14451628

申请日：2014-08-05

Applicant: QUALCOMM Incorporated

Inventor： Dario Suarez Gracia ,  Han Zhao ,  Pablo Montesinos Ortego ,  Gheorghe Calin Cascaval ,  James Xenidis

IPC: G06F9/54 ,  G06F1/32 ,  G06F9/50

CPC classification number: G06F1/3296 ,  G06F9/4856 ,  G06F9/4893 ,  G06F9/526 ,  Y02D10/24

Abstract: Multi-processor computing device methods manage resource accesses by a signaling event manager signaling processor elements requesting access to a resource to wake up to access the resource when the resource is available or wait for an event when the resource is busy. Processor elements may enter a sleep state while awaiting access to the requested resource. When multiple elements are waiting for the resource, the processor element with a highest assigned priority is signaled to wake up when the resource is available without waking other elements. Priorities may be assigned to processor elements waiting for the resource based on a heuristic or parameter that may depend on a state of the computing device or the processor elements. A sleep duration may be estimated for a processor element waiting for a resource and the processor element may be removed from a scheduling queue or assigned another thread during the sleep duration.

Abstract translation: 多处理器计算设备方法通过信令事件管理器信令处理器元件管理资源访问，所述信令处理器元件在资源可用时请求访问资源以唤醒资源以访问资源，或在资源占用时等待事件。 处理器元件可以在等待访问所请求的资源的同时进入休眠状态。 当多个元素正在等待资源时，具有最高分配优先级的处理器元件发出信号，以在资源可用时唤醒，而不唤醒其他元素。 可以基于可能依赖于计算设备或处理器元件的状态的启发式或参数将优先级分配给等待资源的处理器元件。 可以为等待资源的处理器元件估计睡眠持续时间，并且可以在睡眠持续时间期间将处理器元件从调度队列中移除或分配另一线程。

公开(公告)号：US20150205720A1

公开(公告)日：2015-07-23

申请号：US14262871

申请日：2014-04-28

Applicant: QUALCOMM Incorporated

Inventor： Behnam Robatmili ,  Gheorghe Calin Cascaval ,  Madhukar Nagaraja Kedlay ,  Dario Suarez Gracia

IPC: G06F12/08

CPC classification number: G06F9/4491 ,  G06F12/0802

Abstract: Aspects include apparatuses, systems, and methods for hardware acceleration for inline caches in dynamic languages. An inline cache may be initialized for an instance of a dynamic software operation. A call of an initialized instance of the dynamic software operation may be executed by an inline cache hardware accelerator. The inline cache may be checked to determine that its data is current. When the data is current, the initialized instance of the dynamic software operation may be executed using the related inline cache data. When the data is not current, a new inline cache may be initialized for the instance of the dynamic software operation, including the not current data of a previously initialized instance of the dynamic software operation. The inline cache hardware accelerator may include an inline cache memory, a coprocessor, and/or a functional until one an inline cache pipeline connected to a processor pipeline.

Abstract translation: 方面包括用于动态语言的内联高速缓存的硬件加速的装置，系统和方法。 可以为动态软件操作的实例初始化内联缓存。 动态软件操作的初始化实例的调用可以由内联高速缓存硬件加速器执行。 可以检查内联高速缓存以确定其数据是当前的。 当数据是最新的时，可以使用相关的在线高速缓存数据来执行动态软件操作的初始化实例。 当数据不是当前的时候，可以为动态软件操作的实例初始化新的内联高速缓存，包括动态软件操作的先前初始化的实例的当前数据。 内联高速缓存硬件加速器可以包括内联高速缓冲存储器，协处理器和/或功能，直到连接到处理器流水线的内联高速缓存流水线为止。

公开(公告)号：US20140173556A1

公开(公告)日：2014-06-19

申请号：US14083264

申请日：2013-11-18

Applicant: QUALCOMM Incorporated

Inventor： Behnam Robatmili ,  Derek Jay Conrod ,  Mohammad Hossein Reshadi ,  Subrato Kumar De ,  Gheorghe Calin Cascaval

IPC: G06F9/44

CPC classification number: G06F8/31 ,  G06F9/45529

Abstract: Systems, methods, and devices for executing a function in a dynamically-typed language are described herein. In one aspect, a method includes generating a function selection decision tree based on one or more specializations of a generic function and one or more function inputs via an electronic device. The method further includes selecting one of the specializations or the generic function based on an input type of at least one function input via the electronic device. The method further includes calling the selected specialization or generic function via the electronic device. Another aspect of the subject matter described in the disclosure provides a method of executing a function in a prototype-based dynamically-typed language. The method includes maintaining a list of calls to one or more specializations of the function via the electronic device. The method further includes creating or destroying a specialization of the function via the electronic device. The method further includes updating calls to the created or destroyed specialization via the electronic device. Advantageously in certain embodiments, selection logic overhead can be reduced using criteria that can utilize different weightages for one or more inputs based on heuristics or runtime information.

Abstract translation: 这里描述了用于以动态类型语言执行功能的系统，方法和设备。 一方面，一种方法包括基于通用功能的一个或多个专业化以及经由电子设备的一个或多个功能输入来生成功能选择决策树。 该方法还包括基于经由电子设备的至少一个功能输入的输入类型来选择专业化或通用功能之一。 该方法还包括通过电子设备调用所选择的专门化或通用功能。 在本公开中描述的主题的另一方面提供了一种在基于原型的动态类型语言中执行功能的方法。 该方法包括通过电子设备维护对功能的一个或多个专业化的呼叫列表。 该方法还包括通过电子设备创建或破坏功能的专业化。 该方法还包括通过电子设备更新对创建或销毁的专业化的呼叫。 有利地，在某些实施例中，可以使用可以基于启发式或运行时信息为一个或多个输入利用不同权重的标准来减少选择逻辑开销。

公开(公告)号：US20180020024A1

公开(公告)日：2018-01-18

申请号：US15417718

申请日：2017-01-27

Applicant: QUALCOMM Incorporated

Inventor： Hui Chao ,  Nayeem Islam ,  Gheorghe Calin Cascaval

IPC: H04L29/06 ,  H04L12/26 ,  G06F17/18

CPC classification number: H04L63/1491 ,  G06F17/18 ,  G06F21/53 ,  G06F21/554 ,  H04L43/0876 ,  H04L63/02 ,  H04L63/1425 ,  H04L67/42

Abstract: Various embodiments include methods for protecting a web application server from non-benign web application usage. Embodiment methods may include receiving from a client device a service request message that includes information suitable for causing a web application operating on the web application server to perform one or more operations. In response, a processor, such as within the web application server or another network device, may analyze usage of the web application by the client device via a combination of a honeypot component, a sandboxed detonator component, and a Web Application Firewall (WAF) component. Analysis results may be generated by analyzing the received service request message or a server response message sent by the web application server. The analysis results may be used to identify non-benign web application usage. Actions may be taken to protect the web application server and/or the client device from the identified non-benign web application usage.