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1.发明授权Media peripheral interface, electronic device with media peripheral interface, and communication method between processor and peripheral device 有权媒体外设接口，具有媒体外设接口的电子设备，以及处理器与外围设备之间的通信方式公开(公告)号：US09588543B2
公开(公告)日：2017-03-07
申请号：US14139951
申请日：2013-12-24
Applicant: MediaTek Inc.
Inventor： Tsung-Huang Chen , Li-Chun Tu , Wen-Chi Chao
CPC classification number: G06F1/08 , G06F13/423
Abstract: A media peripheral interface for communication between a processor and a peripheral device includes a clock port, a plurality of data I/Os, and a data strobe port. The clock port is operative to transfer a clock signal to the peripheral device. The data I/Os are provided for command transfer to the peripheral device and for data transfer to and from the peripheral device. The data strobe port is operative to transfer a data strobe signal to or from the peripheral device according to an instruction that the processor issues to the peripheral device. According to the clock signal, command information transferred via the data I/Os is captured. According to rising edges and falling edges of the data strobe signal, data transferred via the data I/Os are captured.
Abstract translation: 用于处理器和外围设备之间的通信的媒体外围接口包括时钟端口，多个数据I / O和数据选通端口。 时钟端口用于将时钟信号传送到外围设备。 数据I / O被提供用于命令传送到外围设备，以及用于数据传送到外围设备。 数据选通端口用于根据处理器向外围设备发出的指令将数据选通信号传送到外围设备或从外围设备传送数据选通信号。 根据时钟信号，捕获通过数据I / O传送的命令信息。 根据数据选通信号的上升沿和下降沿，捕获通过数据I / O传输的数据。
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公开(公告)号：US20150140939A1
公开(公告)日：2015-05-21
申请号：US14603367
申请日：2015-01-23
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
IPC: H04B1/40
CPC classification number: H04B1/40
Abstract: A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the integrated processing circuit and the first memory are packaged in a single semiconductor package.
Abstract translation: 提供一种包括集成处理电路和第一存储器的无线通信装置。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是 RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据，其中集成处理电路和第一存储器封装在单个半导体封装中。
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公开(公告)号：US20170055222A1
公开(公告)日：2017-02-23
申请号：US15344599
申请日：2016-11-07
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
CPC classification number: H04W52/0261 , G06F3/0625 , G06F3/0659 , G06F3/067 , H04B1/40 , H04W88/06 , Y02D70/00 , Y02D70/26 , Y02D70/40
Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit is put in a first package, the first memory is put in a second package, and the first package and the second package are packaged in a single device.
Abstract translation: 提供一种包括集成处理电路，第一存储器和测试电路的无线通信设备。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是 RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据。 测试电路耦合到第一存储器，并且能够测试第一存储器以确定第一存储器是否是有效存储器。 将RF单元放入第一封装中，将第一存储器放入第二封装中，并将第一封装和第二封装封装在单个器件中。
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公开(公告)号：US09713093B2
公开(公告)日：2017-07-18
申请号：US15000023
申请日：2016-01-18
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
CPC classification number: H04W52/0261 , G06F3/0625 , G06F3/0659 , G06F3/067 , H04B1/40 , H04W88/06 , Y02D70/00 , Y02D70/26 , Y02D70/40
Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit and the first memory are placed in a single module.
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公开(公告)号：US09258030B2
公开(公告)日：2016-02-09
申请号：US14613374
申请日：2015-02-04
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
IPC: H04B1/00 , H04B1/40 , H04B1/3827 , H04B1/713 , H04L29/00
Abstract: A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one or more of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the RF unit and the first memory are packaged in a single semiconductor device.
Abstract translation: 提供一种包括集成处理电路和第一存储器的无线通信装置。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是一个或多个 的RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据，其中RF单元和第一存储器封装在单个半导体器件中。
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Patent Agency Ranking
公开(公告)号：US09801136B2
公开(公告)日：2017-10-24
申请号：US15344599
申请日：2016-11-07
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
CPC classification number: H04W52/0261 , G06F3/0625 , G06F3/0659 , G06F3/067 , H04B1/40 , H04W88/06 , Y02D70/00 , Y02D70/26 , Y02D70/40
Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit is put in a first package, the first memory is put in a second package, and the first package and the second package are packaged in a single device.
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7.发明授权公开(公告)号：US09588507B2
公开(公告)日：2017-03-07
申请号：US14225478
申请日：2014-03-26
Applicant: MediaTek Inc.
Inventor： Chih-Hsiang Hsiao , Li-Chun Tu
Abstract: A low-power wearable controller and associated control method are provided. The wearable controller includes: a processing unit; a memory unit; a peripheral interface unit including a plurality of peripheral interfaces; and a control module, coupled to the processing unit, the memory unit and the peripheral interface unit, wherein the control module is enabled when the wearable controller is operated in a first operation mode, and the control module is disabled when the wearable controller is operated in a second operation mode.
Abstract translation: 提供了一种低功率耐磨控制器和相关控制方法。 可穿戴式控制器包括：处理单元; 记忆单元 包括多个外围接口的外围接口单元; 以及耦合到所述处理单元，所述存储器单元和所述外围接口单元的控制模块，其中当所述可穿戴控制器在第一操作模式下操作时，所述控制模块被启用，并且当所述可穿戴控制器被操作时，所述控制模块被禁用 在第二操作模式中。
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公开(公告)号：US09369172B2
公开(公告)日：2016-06-14
申请号：US14603367
申请日：2015-01-23
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
CPC classification number: H04B1/40
Abstract: A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the integrated processing circuit and the first memory are packaged in a single semiconductor package.
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9.发明申请公开(公告)号：US20160154454A1
公开(公告)日：2016-06-02
申请号：US14905971
申请日：2015-06-05
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu
CPC classification number: G06F1/3296 , G06F1/3268 , G06F3/06 , G06F3/061 , G06F3/0625 , G06F3/0634 , G06F3/0679 , G06F9/4418 , G06F13/16 , Y02D10/154
Abstract: A storage apparatus, which is configured to receive an enter instruction to enter a deep sleep mode and configured to receive an awaking instruction to exit the deep sleep mode and to enter a normal mode. The storage apparatus keeps data stored therein in the deep sleep mode, and the storage apparatus can be normally accessed in the normal mode. If the storage apparatus is controlled to enter the normal mode while in the deep sleep mode, the storage apparatus enters the normal mode after the storage apparatus exits the deep sleep mode for a recovery time interval.
Abstract translation: 一种存储装置，其被配置为接收进入深度睡眠模式的输入指令并且被配置为接收唤醒指令以退出深度睡眠模式并进入正常模式。 存储装置将存储在其中的数据保存在深度睡眠模式，并且可以在正常模式下正常地访问存储装置。 如果存储装置在深度睡眠模式下被控制进入正常模式，则在存储装置退出深度睡眠模式恢复时间间隔之后，存储装置进入正常模式。
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公开(公告)号：US20160134324A1
公开(公告)日：2016-05-12
申请号：US15000023
申请日：2016-01-18
Applicant: MEDIATEK INC.
Inventor： Li-Chun Tu , Chia-Hao Yang , Tsung-Huang Chen
IPC: H04B1/40
CPC classification number: H04W52/0261 , G06F3/0625 , G06F3/0659 , G06F3/067 , H04B1/40 , H04W88/06 , Y02D70/00 , Y02D70/26 , Y02D70/40
Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit and the first memory are placed in a single module.
Abstract translation: 提供一种包括集成处理电路，第一存储器和测试电路的无线通信设备。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是 RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据。 测试电路耦合到第一存储器，并且能够测试第一存储器以确定第一存储器是否是有效存储器。 RF单元和第一存储器被放置在单个模块中。
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