公开(公告)号：US20170125327A1

公开(公告)日：2017-05-04

申请号：US15176163

申请日：2016-06-08

Applicant: MEDIATEK INC.

Inventor： Shiann-Tsong Tsai ,  Hsueh-Te Wang ,  Chin-Chiang Chang

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/49586 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/4952 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3862 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A semiconductor package includes a carrier substrate having a top surface, a semiconductor die mounted on the top surface, a plurality of bonding wires connecting the semiconductor die to the carrier substrate, an insulating material coated on the bonding wires, and a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.

公开(公告)号：US10685943B2

公开(公告)日：2020-06-16

申请号：US15701456

申请日：2017-09-12

Applicant: MEDIATEK INC.

Inventor： Shiann-Tsong Tsai ,  Hsueh-Te Wang

IPC: H01L25/16 ,  H01L23/29 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495

Abstract: A semiconductor chip package includes a substrate; a semiconductor die mounted on the substrate, wherein the semiconductor die comprises a bond pad disposed on an active surface of the semiconductor die, and a passivation layer covering perimeter of the bond pad, wherein a bond pad opening in the passivation layer exposes a central area of the bond pad; a conductive paste post printed on the exposed central area of the bond pad; and a bonding wire secured to a top surface of the conductive paste post. The conductive paste post comprises copper paste.

公开(公告)号：US10978406B2

公开(公告)日：2021-04-13

申请号：US16007032

申请日：2018-06-13

Applicant: MEDIATEK INC.

Inventor： Hung-Jen Chang ,  Jen-Chuan Chen ,  Hsueh-Te Wang ,  Wen-Sung Hsu

IPC: H01L23/552 ,  H01L25/065 ,  H01L25/16 ,  H01L21/3205 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/285

Abstract: A semiconductor package structure including an encapsulating layer, a package substrate, and a conductive shielding layer is provided. The package substrate has a device region covered by the encapsulating layer and an edge region surrounding the device region and exposed from the encapsulating layer. The package substrate includes an insulating layer and a patterned conductive layer in a level of the insulating layer. The patterned conductive layer includes conductors in and along the edge region. The edge region is partially exposed from the conductors, as viewed from a top-view perspective. The conductive shielding layer covers and surrounds the encapsulating layer and is electrically connected to the conductors.

公开(公告)号：US20180006002A1

公开(公告)日：2018-01-04

申请号：US15701456

申请日：2017-09-12

Applicant: MEDIATEK INC.

Inventor： Shiann-Tsong Tsai ,  Hsueh-Te Wang

IPC: H01L25/16 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L23/29

Abstract: A semiconductor chip package includes a substrate; a semiconductor die mounted on the substrate, wherein the semiconductor die comprises a bond pad disposed on an active surface of the semiconductor die, and a passivation layer covering perimeter of the bond pad, wherein a bond pad opening in the passivation layer exposes a central area of the bond pad; a conductive paste post printed on the exposed central area of the bond pad; and a bonding wire secured to a top surface of the conductive paste post. The conductive paste post comprises copper paste.

公开(公告)号：US10037936B2

公开(公告)日：2018-07-31

申请号：US15176163

申请日：2016-06-08

Applicant: MEDIATEK INC.

Inventor： Shiann-Tsong Tsai ,  Hsueh-Te Wang ,  Chin-Chiang Chang

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/29

CPC classification number: H01L23/49586 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/4952 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3862 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A semiconductor package includes a carrier substrate having a top surface, a semiconductor die mounted on the top surface, a plurality of bonding wires connecting the semiconductor die to the carrier substrate, an insulating material coated on the bonding wires, and a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.