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公开(公告)号：US20180286541A1
公开(公告)日：2018-10-04
申请号：US15764570
申请日：2016-09-26
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
CPC classification number: H01C1/142 , H01C1/012 , H01C1/148 , H01C7/00 , H01C17/006 , H01C17/281
Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate which is made of ceramics; a pair of front electrodes which are provided on lengthwise opposite end portions in a front surface of the insulating substrate; a resistive element which is provided between and connected to the two front electrodes; a protective layer which is made of a resin and which entirely covers the front surface of the insulating substrate including the two front electrodes and the resistive element; and a pair of cap-shaped end-surface electrodes which are provided on the lengthwise opposite end portions of the insulating substrate to establish electrical continuity to the front electrodes respectively; wherein: a chip element assembly in which the insulating substrate and the protective layer are laminated on each other but the end-surface electrodes have not been formed yet has an external shape substantially like a square cylinder.
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公开(公告)号：US20180075954A1
公开(公告)日：2018-03-15
申请号：US15565704
申请日：2016-04-07
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
Abstract: Provided is a chip resistor having wide and flat end-face electrodes on a surface thereof and having increased connection reliability between upper electrodes and the end-face electrodes. The chip resistor according to the present invention is provided with: a cuboidal insulating substrate 1; a pair of upper electrodes 2 disposed at both ends in a longitudinal direction on a surface of the insulating substrate 1; a resistor body 3 disposed between the upper electrodes 2; an insulating protective layer 4 covering the entire surfaces of the upper electrodes 2 and the resistor body 3; and a pair of end-face electrodes 5 disposed on both end faces in the longitudinal direction of the insulating substrate 1, wherein the upper electrodes 2 include bent portions 2a extending around from between the insulating substrate 1 and the protective layer 4 along the end faces of the protective layer 4, and the end-face electrodes 5 are connected to the exposed portions of the upper electrodes 2, including the bent portions 2a, exposed from between the insulating substrate 1 and the protective layer 4.
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公开(公告)号：US20170084364A1
公开(公告)日：2017-03-23
申请号：US15126199
申请日：2015-03-11
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
IPC: H01C1/148 , H01C17/242 , H01C1/012 , H01C17/00
CPC classification number: H01C1/148 , H01C1/012 , H01C1/12 , H01C1/14 , H01C7/00 , H01C17/006 , H01C17/06 , H01C17/242
Abstract: Provided are: a chip resistor whose resistance value can be adjusted with high accuracy while maintaining high sulfurization resistance of electrodes of the chip resistor even in the case where the resistance value of the chip resistor is low; and a method for manufacturing this chip resistor. This chip resistor (1) includes: an insulating film that covers a resistor substance (4) formed so as to make contact with both of a pair of electrodes (3, 3) formed on an upper surface (2A) of an insulating substrate (2). Each of the pair of electrodes (3, 3) includes: (1) a main electrode layer (3B) that contains silver as a main metal component and 10 weight % or more of palladium as another metal component, and an auxiliary electrode layer (3A) that is lower in specific resistance than the main electrode layer (3B); (2) a laminate part where the auxiliary electrode layer (3A) and the main electrode layer (3B) are sequentially laminated in this order on a single surface of the insulating substrate (2); and (3) an exposed part (3A1) of the auxiliary electrode layer (3A) where a part of the auxiliary electrode layer (3A) is not covered with the main electrode layer (3B) on a far side from the resistor substance (4), and parts (3B1) that extend from a near side to the far side with respect to the resistor substance (4).
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公开(公告)号：US20170316853A1
公开(公告)日：2017-11-02
申请号：US15523019
申请日：2015-08-25
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
IPC: H01C1/142 , H01C17/242 , H01C17/00 , H01C17/28 , H01C1/012
CPC classification number: H01C1/142 , H01C1/012 , H01C1/032 , H01C1/148 , H01C7/18 , H01C17/006 , H01C17/242 , H01C17/281
Abstract: To provide a chip resistor in which a resistive element can be surely protected from an external environment and which is also excellent in corrosion resistance, a chip resistor 1 is configured to include an insulating substrate 2, a pair of front electrode 3 provided on opposite end portions of a front surface of the insulating substrate 2, a pair of back electrodes 7 provided on opposite end portions of a back surface of the insulating substrate 2, a resistive element 4 provided to extend onto the two front electrodes 3, a first insulating layer 5 covering the resistive element 4, a second insulating layer 6 made of a resin material to cover the first insulating layer 5, end surface electrodes 8 establishing electrical continuity between the front electrodes 3 and the back electrodes 7, plating layers 9 covering the end surface electrodes 8, etc. Rough surface portions 6a made rougher in surface roughness than any other portion of the second insulating layer 6 are formed at opposite end portions of the second insulating layer 6. End portions of the end surface electrodes 8 and the plating layers 9 are brought into tight contact with the rough surface portions 6a respectively.
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公开(公告)号：US20170309378A1
公开(公告)日：2017-10-26
申请号：US15513725
申请日：2015-07-22
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
IPC: H01C7/00 , H01C17/065 , H01C7/20 , H01C17/28 , H01C1/142
CPC classification number: H01C7/003 , H01C1/142 , H01C7/20 , H01C17/06513 , H01C17/281 , H01C17/283
Abstract: The invention is to provide a chip resistor suitable for lowering an initial resistance value. A chip resistor 1 according to the present invention is provided with: an insulating substrate 2; a pair of front electrodes 3 which are provided on a front surface of the insulating substrate 2 so as to face each other with a predetermined interval therebetween; a resistive element 4 which is provided so as to bridge the front electrodes 3; a pair of auxiliary electrodes 5 which are provided so as to cover the front electrodes 3 and overlap end portions of the resistive element 4; and the like. The chip resistor 1 is configured such that: the front electrodes 3 are formed of a material which contains 1 to 5 wt % Pd and the balance Ag; and the auxiliary electrodes 5 are formed of a material which contains 15 to 30 wt % Pd and a metal material (e.g. Au) lower in resistivity than Pd and the balance Ag.
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Patent Agency Ranking
公开(公告)号：US20220229004A1
公开(公告)日：2022-07-21
申请号：US17617122
申请日：2020-05-21
Applicant: KOA CORPORATION
Inventor： Taro KIMURA , Kentaro MATSUMOTO
IPC: G01N27/12
Abstract: A sulfurization detection sensor 10 comprises: a rectangular parallelepiped insulation substrate 1, a pair of front electrodes 2 provided at both ends of a front surface in the longitudinal direction of the insulation substrate 1, respectively, a sulfurization detection conductor 3 connected between the front electrodes 2, a pair of protective films 4 for covering a part of the sulfurization detection conductor 3 and that of the front electrodes 2, respectively, a pair of back electrodes 5 provided at both ends of a back surface in the longitudinal direction of the insulation substrate 1, respectively, a pair of end face electrodes 6 provided at both ends in the longitudinal direction of the insulation substrate 1, respectively, and external electrodes 7 provided on front surfaces of the end face electrodes 6, respectively. Specific regions 3b in which a current hardly flows are formed at both ends in the Y-direction of a sulfurization detection portion 3A.
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公开(公告)号：US20210142932A1
公开(公告)日：2021-05-13
申请号：US16611875
申请日：2018-03-13
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO , Natsuki IGUCHI
IPC: H01C17/242 , H01C17/00
Abstract: Regarding a chip resistor including a resistor provided with a first trimming groove for coarse adjustment and a second trimming groove for fine adjustment, the steps of setting the length of a first lateral direction cut part of the first trimming groove after L-shaped direction turning to be a certain length, setting coordinates of a trimming start point of the second trimming groove at a position which is constantly separated from a first vertical direction cut part of the first trimming groove only by a certain distance, and irradiating with a laser light from the coordinates toward a direction orthogonal to a direction between the electrodes are performed to form the second trimming groove which faces the first trimming groove and is oriented in the direction opposite to the orientation of the first trimming groove.
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公开(公告)号：US20180277286A1
公开(公告)日：2018-09-27
申请号：US15763574
申请日：2016-09-20
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO
Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate 1 which is made of ceramics; a pair of front electrodes 2 which are provided on lengthwise opposite end portions in a front surface of the insulating substrate 1; a resistive element 3 which is provided between and connected to the two front electrodes 2; an insulating protective layer 4 which covers the whole of the front surface of the insulating substrate 1 including the resistive element 3 and the two front electrodes 2; and a pair of cap-shaped end-surface electrodes 5 which are provided on the lengthwise opposite end portions of the insulating substrate 1 to be connected to the front electrodes 2; wherein: the protective layer 4 is formed out of a semi-transparent resin material which is similar in color to the insulating substrate 1.
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公开(公告)号：US20180090247A1
公开(公告)日：2018-03-29
申请号：US15562046
申请日：2016-03-08
Applicant: KOA Corporation
Inventor： Kentaro MATSUMOTO , Kotaro KASHIWAGI
CPC classification number: H01C1/148 , H01C1/012 , H01C7/003 , H01C17/006 , H01C17/065 , H01C17/22 , H01C17/281
Abstract: In order to provide a chip resistor which has wide and flat terminal electrodes in its front surface and which has high connection reliability between front electrodes and the terminal electrodes, a chip resistor according to the present invention includes: an insulating substrate 1 shaped like a cuboid; a pair of front electrodes 2 provided on lengthwise opposite edge portions of a front surface of the insulating substrate 1; a resistor body 3 provided between the front electrodes 2; an insulating protection layer 4 covering entire surfaces of the front electrodes 2 and the resistor body 3; and a pair of terminal electrodes 5 provided on lengthwise opposite end surfaces of the insulating substrate 1. The chip resistor is configured such that the front electrodes 2 sandwiched between the insulating substrate 1 and the protection layer 4 are exposed from widthwise end surfaces and the lengthwise end surfaces of the insulating substrate 1, and the terminal electrodes 5 wrap around the widthwise opposite end surfaces of the insulating substrate 1 to be thereby connected to the exposed portions of the front electrodes 2.
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公开(公告)号：US20160163433A1
公开(公告)日：2016-06-09
申请号：US14905459
申请日：2014-07-09
Applicant: KOA CORPORATION
Inventor： Yuya TAKEUE , Todaro UEGANE , Kentaro MATSUMOTO
CPC classification number: H01C17/28 , H01C17/006 , H01C17/06 , H01C17/22 , H01C17/242
Abstract: The invention is to provide a chip-resistor manufacturing method in which chipping can be restrained from occurring in an intersection portion between each primary segmentation groove and each secondary segmentation groove. Primary segmentation grooves 21 each having an uneven depth are formed in one surface of a large substrate 20. Pairs of surface electrodes 3 extending across the primary segmentation grooves 21, resistive elements 5 each striding between the surface electrodes 3 paired with each other, etc. are formed in the one surface of the large substrate 20. Then, primary segmentation is performed on the large substrate 20 along the primary segmentation grooves 21 so as to open the surface side where the surface electrodes 3, the resistive elements 5, etc. are formed. Thus, a plurality of strip-like substrates 30 are obtained from the large substrate 20. During the primary segmentation, each primary segmentation groove 21 begins to break from electrode formation regions which are small in groove depth but strong, and then breaks in intersection portions which are large in groove depth but brittle. Accordingly, it is possible to perform primary segmentation on the primary segmentation groove 21 without applying a large load to the intersection portions which are low in strength. Thus, it is possible to prevent chipping from occurring in the intersection portions.
Abstract translation: 本发明是提供一种芯片电阻器制造方法，其中可以抑制在每个主分割槽和每个二次分割槽之间的交叉部分发生碎裂。 每个具有不均匀深度的主分割槽21形成在大基板20的一个表面中。一对表面电极3延伸穿过主分割凹槽21，电阻元件5各自跨越彼此配对的表面电极3等。 形成在大基板20的一个表面上。然后，沿着主分割槽21对大基板20进行主分割，以便打开表面电极3，电阻元件5等的表面侧 形成。 因此，从大基板20获得多个条状基板30.在主分割期间，每个主分割凹槽21开始从凹槽深度小但较强的电极形成区域断裂，然后在交叉部分中断 其深度大，但脆。 因此，可以对主分割槽21进行主分割，而不对强度低的交点进行大的负载。 因此，可以防止在交叉部分发生切屑。
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