The invention is to provide a chip-resistor manufacturing method in which chipping can be restrained from occurring in an intersection portion between each primary segmentation groove and each secondary segmentation groove. Primary segmentation grooves 21 each having an uneven depth are formed in one surface of a large substrate 20. Pairs of surface electrodes 3 extending across the primary segmentation grooves 21, resistive elements 5 each striding between the surface electrodes 3 paired with each other, etc. are formed in the one surface of the large substrate 20. Then, primary segmentation is performed on the large substrate 20 along the primary segmentation grooves 21 so as to open the surface side where the surface electrodes 3, the resistive elements 5, etc. are formed. Thus, a plurality of strip-like substrates 30 are obtained from the large substrate 20. During the primary segmentation, each primary segmentation groove 21 begins to break from electrode formation regions which are small in groove depth but strong, and then breaks in intersection portions which are large in groove depth but brittle. Accordingly, it is possible to perform primary segmentation on the primary segmentation groove 21 without applying a large load to the intersection portions which are low in strength. Thus, it is possible to prevent chipping from occurring in the intersection portions.