公开(公告)号：US20160260748A1

公开(公告)日：2016-09-08

申请号：US15155325

申请日：2016-05-16

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Jung-Fang CHANG ,  Ker-Yih KAO

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L23/31 ,  H01L23/48

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A thin film transistor is provided, which includes a gate electrode on a substrate; a channel layer overlapping the gate electrode; a dielectric layer between the gate electrode and the channel layer; a source electrode and a drain electrode electrically connecting to the channel layer; a passivation layer overlying the source electrode, the drain electrode, and the gate dielectric layer, wherein the channel layer includes two contact portions being in contact with the source electrode and the drain electrode, respectively, and a non-contact portion located between the two contact portions, and wherein one of the two contact portions has a first thickness in a first direction perpendicular to a surface of the substrate, and the non-contact portion has a second thickness less than the first thickness in the first direction.

摘要翻译： 提供薄膜晶体管，其在基板上包括栅电极; 与栅电极重叠的沟道层; 栅电极和沟道层之间的介电层; 电连接到沟道层的源电极和漏电极; 覆盖所述源电极，所述漏电极和所述栅极电介质层的钝化层，其中所述沟道层分别包括与所述源电极和所述漏电极接触的两个接触部分，以及位于所述二极管之间的非接触部分 接触部分，并且其中所述两个接触部分中的一个在垂直于所述基板的表面的第一方向上具有第一厚度，并且所述非接触部分具有小于所述第一方向上的第一厚度的第二厚度。

公开(公告)号：US20190109154A1

公开(公告)日：2019-04-11

申请号：US16130450

申请日：2018-09-13

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Chin-Chi CHEN

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L27/02

摘要： A panel device includes a substrate, a common electrode, and an electrostatic protection component. The substrate includes an active area and a peripheral area, the peripheral area is outside of the active area, and a plurality of signal lines is disposed on the substrate. The common electrode is disposed on the substrate, and at least part of the common electrode is disposed in the peripheral area. The electrostatic protection component is disposed in the peripheral area of the substrate and electrically connected to one of the plurality of signal lines and the common electrode, and the electrostatic protection component includes a first double-gate transistor. The first double-gate transistor includes a first gate, a second gate, a first electrode and a second electrode. The first gate is electrically connected to the first electrode, and the second gate is electrically connected to the second electrode.

公开(公告)号：US20140374750A1

公开(公告)日：2014-12-25

申请号：US14478148

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Jung-Fang CHANG ,  Ker-Yih KAO

IPC分类号： H01L27/12 ,  H01L23/31 ,  H01L29/51 ,  H01L23/48 ,  H01L29/786 ,  H01L29/417

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

公开(公告)号：US20140374751A1

公开(公告)日：2014-12-25

申请号：US14478172

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Jung-Fang CHANG ,  Ker-Yih KAO

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

摘要翻译： 公开了一种在基板上包括栅电极的薄膜晶体管。 栅极电介质层设置在栅电极和衬底上，源极/漏电极设置在覆盖栅电极的两个边缘部分的栅极电介质层上。 沟道层设置在覆盖栅极电极的中心部分的栅极电介质层上，沟道区域与源极/漏极接触。 绝缘覆盖层覆盖在沟道层上，其中沟道层包括氧化物半导体。

公开(公告)号：US20170256653A1

公开(公告)日：2017-09-07

申请号：US15436752

申请日：2017-02-17

申请人： Innolux Corporation

发明人： Chao-Hsiang WANG ,  Yi-Ching CHEN ,  Kuan-Feng LEE ,  Hsin-Hung LIN ,  Shou-Pu YEH ,  Yuan-Lin WU

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L29/78696 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/7869

摘要： A display panel includes a first substrate, and the first substrate includes a base plate; a first conducive line disposed on the base plate and extending along the first direction; a second conducive line and a third conducive line disposed on the base plate and extending along the second direction; a contact pad positioned between the second and third conducive lines; a semi-conductive layer connecting the contact pad and the second conducive line, and the semi-conductive layer having a thickness d; and a pixel electrode connecting the contact pad. The semi-conductive layer has a channel width W (μm) and a channel length L (μm) between the contact pad and the second conducive line, and a pixel distance Px (μm) between the second and third conducive lines along the first direction, wherein the channel width W is conformed to the following equation: ( 3.035 - 1.5 ) ≤ W - 0.008 × ( P x × L d ) ≤ ( 3.035 + 1.5 ) .

公开(公告)号：US20160260745A1

公开(公告)日：2016-09-08

申请号：US15056538

申请日：2016-02-29

申请人： InnoLux Corporation

发明人： Hui-Min HUANG ,  Hsin-Hung LIN ,  Li-Wei SUNG

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A display panel comprises a TFT substrate and a display medium layer. The display medium layer is disposed on the TFT substrate. The TFT substrate comprises a TFT and a substrate. The TFT is disposed on the substrate and comprises a gate, a metal oxide layer, a source, a drain and a protection layer. The gate is disposed corresponding to the metal oxide layer. The protection layer is disposed on the metal oxide layer. Each of the source and the drain contacts the metal oxide layer through an opening of the protection layer. One side of the gate or one side of the metal oxide layer partially overlaps at least one of the openings. In addition, a display device is also disclosed.

摘要翻译： 显示面板包括TFT基板和显示介质层。 显示介质层设置在TFT基板上。 TFT基板包括TFT和基板。 TFT设置在基板上，包括栅极，金属氧化物层，源极，漏极和保护层。 栅对应于金属氧化物层设置。 保护层设置在金属氧化物层上。 源极和漏极中的每一个通过保护层的开口接触金属氧化物层。 栅极的一侧或金属氧化物层的一侧部分地与至少一个开口重叠。 此外，还公开了显示装置。

公开(公告)号：US20140377906A1

公开(公告)日：2014-12-25

申请号：US14478124

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Jung-Fang CHANG ,  Ker-Yih KAO

IPC分类号： H01L29/66 ,  H01L21/4757 ,  H01L21/47 ,  H01L21/471 ,  H01L27/12 ,  H01L21/441

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

摘要翻译： 公开了一种在基板上包括栅电极的薄膜晶体管。 栅极电介质层设置在栅电极和衬底上，源极/漏电极设置在覆盖栅电极的两个边缘部分的栅极电介质层上。 沟道层设置在覆盖栅极电极的中心部分的栅极电介质层上，沟道区域与源极/漏极接触。 绝缘覆盖层覆盖在沟道层上，其中沟道层包括氧化物半导体。