公开(公告)号：US11955406B2

公开(公告)日：2024-04-09

申请号：US17570647

申请日：2022-01-07

Applicant: Google LLC

Inventor： Yingying Wang ,  Emad Samadiani ,  Madhusudan K. Iyengar ,  Padam Jain ,  Xiaojin Wei ,  Teckgyu Kang ,  Sudharshan Sugavanesh Udhayakumar ,  Yingshi Tang

IPC: H01L23/46 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/46 ,  H01L21/56 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/29035 ,  H01L2224/32221 ,  H01L2224/73253

Abstract: An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.

公开(公告)号：US20240121931A1

公开(公告)日：2024-04-11

申请号：US18225944

申请日：2023-07-25

Applicant: Google LLC

Inventor： Yingshi Tang ,  Yingying Wang ,  Padam Jain ,  Emad Samadiani ,  Sudharshan Sugavanesh Udhayakumar ,  Madhusudan K. Iyengar

IPC: H05K13/04 ,  H05K1/02 ,  H05K7/20

CPC classification number: H05K13/0409 ,  H05K1/0203 ,  H05K7/20509

Abstract: Methods and structures for providing thermal dissipating elements on integrated circuit (“IC”) dies are disclosed. A thermal dissipating element placement assembly, such as a pin fin placement assembly, along with a vacuum pickup assembly, can be used to assist with simultaneous placement of multiple pin fins with desired profiles on desired locations of the IC die. The pin fin placement assembly may be comprised of one or more plates with a plurality of apertures therein for receiving the pin fins. The pin fin placement assembly can be further incorporated into a thermal cooling structure, which can include a manifold configured to encase the IC die and attached pin fins.

公开(公告)号：US20240055317A1

公开(公告)日：2024-02-15

申请号：US17885022

申请日：2022-08-10

Applicant: Google LLC

Inventor： Emad Samadiani ,  Padam Jain ,  Yingshi Tang ,  Sue Yun Teng ,  Nicholas Chao Wei Wong ,  Kieran Miller ,  Sudharshan Sugavanesh Udhayakumar

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/3677 ,  H01L23/49816 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/0401

Abstract: A compliant pad spacer utilized in a three-dimensional IC packaging is provided. The compliant pad spacer may be utilized to provide adequate support among the substrates or boards, such as packing substrates, interposers or print circuit broads (PCBs), so as to minimize the effects of substrate warpage or structural collapse in the IC packaging. In one example, the compliant pad spacer includes an insulating material, such as silicon-based polymer composites having ceramic fillers disposed therein.

公开(公告)号：US20240038620A1

公开(公告)日：2024-02-01

申请号：US17876813

申请日：2022-07-29

Applicant: Google LLC

Inventor： Yingshi Tang ,  Yingying Wang ,  Padam Jain ,  Emad Samadiani ,  Sudharshan Sugavanesh Udhayakumar ,  Madhusudan K. Iyengar

IPC: H01L23/367 ,  H01L23/467 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/3677 ,  H01L23/467 ,  H01L23/3128 ,  H01L24/18 ,  H01L2924/1811 ,  H01L2224/16227

Abstract: A pin fin placement assembly utilized to form pin fins in a thermal dissipating feature is provided. The pin fin placement assembly may place the pin fins on an IC die disposed in the IC package. The pin fin placement assembly may assist massively placing the pin fins with desired profiles and numbers on desired locations of the IC die. The plurality of pin fins is formed in a first plurality of apertures in the pin fin placement assembly. A thermal process is then performed to solder the plurality of pin fins on the IC die.

公开(公告)号：US20230163048A1

公开(公告)日：2023-05-25

申请号：US17570647

申请日：2022-01-07

Applicant: Google LLC

Inventor： Yingying Wang ,  Emad Samadiani ,  Madhusudan K. Iyengar ,  Padam Jain ,  Xiaojin Wei ,  Teckgyu Kang ,  Sudharshan Sugavanesh Udhayakumar ,  Yingshi Tang

IPC: H01L23/46 ,  H01L21/56

CPC classification number: H01L23/46 ,  H01L21/56 ,  H01L24/73

Abstract: An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.