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    Sensing circuit for recognizing movement and movement recognizing method thereof
    2.
    发明授权
    Sensing circuit for recognizing movement and movement recognizing method thereof 有权
    用于识别其运动和运动识别方法的感测电路

    公开(公告)号：US09341713B2

    公开(公告)日：2016-05-17

    申请号：US14454603

    申请日：2014-08-07

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Chun-Gi Lyuh ,  Jung Hee Suk ,  Young-deuk Jeon ,  Tae Moon Roh

    IPC: G01S17/58 ,  G01S17/00 ,  G01S7/491

    CPC classification number: G01S17/58 ,  G01S7/4912 ,  G01S17/003

    Abstract: Provided is a sensing circuit for recognizing a movement including: at least one light emitting device outputting light; at least one light receiving device receiving the light reflected by an object on the light emitting device and generating a plurality of current signals proportional to an amount of incident light; a signal conversion unit converting the plurality of current signals into a plurality of digital signals; a recognition unit measuring a synthetic digital signal to determine whether an object moves by receiving the plurality of current signals; and a control unit controlling the recognition unit, wherein the recognition unit generates a clock signal for the synthetic digital signal greater than a critical value and measures a count generated by the clock signal; and the control unit determines whether the object moves through a comparison of the count and a reference value.

    Abstract translation: 提供一种用于识别移动的感测电路，包括：至少一个输出光的发光装置; 至少一个光接收装置，其接收由所述发光装置上的物体反射的光，并产生与入射光量成比例的多个电流信号; 信号转换单元，将所述多个电流信号转换成多个数字信号; 识别单元，测量合成数字信号，以通过接收多个电流信号来确定对象是否移动; 以及控制单元，其控制所述识别单元，其中所述识别单元生成大于临界值的所述合成数字信号的时钟信号，并测量由所述时钟信号产生的计数; 并且控制单元确定对象是否通过计数和参考值的比较来移动。

    Convolutional operation device with dimensional conversion
    3.
    发明授权
    Convolutional operation device with dimensional conversion 有权

    公开(公告)号：US11487845B2

    公开(公告)日：2022-11-01

    申请号：US16682011

    申请日：2019-11-13

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Jung Hee Suk ,  Chun-Gi Lyuh

    IPC: G06F17/15 ,  G06N3/06

    Abstract: A convolutional operation device for performing convolutional neural network processing includes an input sharing network including first and second input feature map registers configured to shift each input feature map, which is inputted in row units, in a row or column direction and output the shifted input feature map and arranged in rows and columns, a first MAC array connected to the first input feature map registers, an input feature map switching network configured to select one of the first and second input feature map registers, a second MAC array connected to one selected by the input feature map switching network among the first and second input feature map registers, and an output shift network configured to shift the output feature map from the first MAC array and the second MAC array to transmit the shifted output feature map to an output memory.

    Reorganizable data processing array for neural network computing
    7.
    发明授权
    Reorganizable data processing array for neural network computing 有权

    公开(公告)号：US12210952B2

    公开(公告)日：2025-01-28

    申请号：US16201871

    申请日：2018-11-27

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Young-Su Kwon ,  Chan Kim ,  Hyun Mi Kim ,  Jeongmin Yang ,  Chun-Gi Lyuh ,  Jaehoon Chung ,  Yong Cheol Peter Cho

    IPC: G06N3/04

    Abstract: A reorganizable neural network computing device is provided. The computing device includes a data processing array unit including a plurality of operators disposed at locations corresponding to a row and a column. One or more chaining paths which transfer the first input data from the operator of the first row of the data processing array to the operator of the second row are optionally formed. The plurality of first data input processors of the computing device transfer the first input data for a layer of the neural network to the operators along rows of the data processing array unit, and the plurality of second data input processors of the computing device transfer the second input data to the operators along the columns of the data processing array.

    Data generation device for parallel processing
    9.
    发明授权
    Data generation device for parallel processing 有权

    公开(公告)号：US10725789B2

    公开(公告)日：2020-07-28

    申请号：US16154508

    申请日：2018-10-08

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Jung Hee Suk ,  Chun-Gi Lyuh

    IPC: G06F9/38 ,  G06F3/06 ,  G06F15/80

    Abstract: Provided is a data generation device for generating input data to be inputted to a parallel processing device. The data generation device includes: a controller configured to output padding data; and a data processing device configured to receive original data and to generate the input data in which at least a portion of the original data is padded with the padding data. The data processing device includes: a first multiplexer configured to receive the padding data and the original data; a register configured to store data outputted from the first multiplexer; and a second multiplexer configured to receive data outputted from the first multiplexer and data stored in the register.

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