Abstract:
The embodiments of the present disclosure provide a partition-based gate driving method and apparatus and a gate driving unit, and relates to the field of display technology. In the embodiments of the present disclosure, the partition-based gate driving method comprises: generating a control signal according to an acquired human eye observation partition; generating a second clock signal or a third clock signal according to the control signal; and controlling a second output signal according to the second clock signal or controlling a third output signal according to the third clock signal, thereby controlling the display area to be displayed by partitions.
Abstract:
Embodiments of the present disclosure provide a shift register unit, a gate driving circuit, a driving method and a display apparatus, which can simplify the design of connection lines among the shift register units and thereby is beneficial to achieve a narrow frame of the product. The shift register unit comprises an input module connected to an input terminal, a first control signal terminal and a first node; an output module connected to a first node, a second node, a second control signal terminal, an output terminal and a second level terminal; and an output control module connected to the first node, the second node, the output terminal, a first level terminal and the second level terminal. The embodiments of the present disclosure are used to manufacture displays.
Abstract:
Embodiments of the present disclosure provide a shift register unit, a gate driving circuit, a driving method and a display apparatus, which can simplify the design of connection lines among the shift register units and thereby is beneficial to achieve a narrow frame of the product. The shift register unit comprises an input module connected to an input terminal, a first control signal terminal and a first node; an output module connected to a first node, a second node, a second control signal terminal, an output terminal and a second level terminal; and an output control module connected to the first node, the second node, the output terminal, a first level terminal and the second level terminal. The embodiments of the present disclosure are used to manufacture displays.
Abstract:
Embodiments of the present disclosure provide a shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a reset circuit, a plurality of output circuits, a plurality of pull-down circuits and a plurality of pull-down control circuits. During a first time period, all of signals output by the plurality of output circuits are valid. During a second time period, at least one of the signals output by the plurality of output circuits is invalid, wherein the second time period comprises a first sub-period and a second sub-period, and the state of at least one of the signals output by the plurality of output circuits during the first sub-period is opposite to the state thereof during the second sub-period. The shift register unit may enable transistors in a pixel circuit to switch between ON and OFF states, so as to extend lifetime of the transistors.
Abstract:
Embodiments of the present disclosure provide a shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a reset circuit, a plurality of output circuits, a plurality of pull-down circuits and a plurality of pull-down control circuits. During a first time period, all of signals output by the plurality of output circuits are valid. During a second time period, at least one of the signals output by the plurality of output circuits is invalid, wherein the second time period comprises a first sub-period and a second sub-period, and the state of at least one of the signals output by the plurality of output circuits during the first sub-period is opposite to the state thereof during the second sub-period. The shift register unit may enable transistors in a pixel circuit to switch between ON and OFF states, so as to extend lifetime of the transistors.