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公开(公告)号:US10269290B2
公开(公告)日:2019-04-23
申请号:US15680416
申请日:2017-08-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang Shang , Mingfu Han , Haoliang Zheng , Han-Seung- Woo , Im-Yun- Sik , Jing Lv , Yinglong Huang , Jun-Jung- Mok , Xue Dong , Zhichong Wang , Xing Yao , Lijun Yuan , Zhihe Jin
IPC: G09G3/36 , G09G3/20 , G11C19/28 , G09G3/3266
Abstract: Embodiments of the present disclosure provide a shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a reset circuit, a plurality of output circuits, a plurality of pull-down circuits and a plurality of pull-down control circuits. During a first time period, all of signals output by the plurality of output circuits are valid. During a second time period, at least one of the signals output by the plurality of output circuits is invalid, wherein the second time period comprises a first sub-period and a second sub-period, and the state of at least one of the signals output by the plurality of output circuits during the first sub-period is opposite to the state thereof during the second sub-period. The shift register unit may enable transistors in a pixel circuit to switch between ON and OFF states, so as to extend lifetime of the transistors.
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2.
公开(公告)号:US20180190180A1
公开(公告)日:2018-07-05
申请号:US15680416
申请日:2017-08-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang Shang , Mingfu Han , Haoliang Zheng , Han-Seung- Woo , Im-Yun- Sik , Jing Lv , Yinglong Huang , Jun-Jung- Mok , Xue Dong , Zhichong Wang , Xing Yao , Lijun Yuan , Zhihe Jin
CPC classification number: G09G3/2092 , G09G3/3266 , G09G3/3677 , G09G2300/0809 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2320/043 , G09G2330/02 , G11C19/28
Abstract: Embodiments of the present disclosure provide a shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a reset circuit, a plurality of output circuits, a plurality of pull-down circuits and a plurality of pull-down control circuits. During a first time period, all of signals output by the plurality of output circuits are valid. During a second time period, at least one of the signals output by the plurality of output circuits is invalid, wherein the second time period comprises a first sub-period and a second sub-period, and the state of at least one of the signals output by the plurality of output circuits during the first sub-period is opposite to the state thereof during the second sub-period. The shift register unit may enable transistors in a pixel circuit to switch between ON and OFF states, so as to extend lifetime of the transistors.
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