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公开(公告)号：US11545510B2
公开(公告)日：2023-01-03
申请号：US17054823
申请日：2020-04-16
Inventor： Wei Song , Ce Zhao , Yuankui Ding , Ming Wang , Yingbin Hu , Qinghe Wang , Wei Li , Liusong Ni
Abstract: This disclosure discloses an array substrate, and a production method, a display panel, and a display apparatus thereof. Particularly, this disclosure proposes a method of producing an array substrate, having the following steps: providing a substrate having a drive transistor region and a switch transistor region thereon; forming an preset layer for active layer on a side of the substrate; patterning the preset layer for active layer to form a drive active layer and a switch active layer, wherein an orthographic projection of the drive active layer on the substrate is located in the drive transistor region, an orthographic projection of the switch active layer on the substrate is located in the switch transistor region, and a carrier concentration in the drive active layer is less than a carrier concentration in the switch active layer.
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公开(公告)号：US11444128B2
公开(公告)日：2022-09-13
申请号：US16338935
申请日：2018-09-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Dongfang Wang , Tongshang Su , Ming Wang , Ce Zhao , Bin Zhou
IPC: H01L27/32
Abstract: An OLED display substrate, a manufacturing method and a display device are provided. The OLED display substrate includes a base substrate and a plurality of pixel units arranged on the base substrate, each pixel unit includes a plurality of subpixel units, and each subpixel unit includes a switching TFT and a bottom-emission OLED, the OLED display substrate further includes a light-shielding layer arranged between the OLED and the switching TFT, and an orthogonal projection of the light-shielding layer onto the base substrate completely covers an orthogonal projection of a semiconductor region of the switching TFT onto the base substrate.
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公开(公告)号：US20180294289A1
公开(公告)日：2018-10-11
申请号：US15567193
申请日：2016-10-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
CPC classification number: H01L27/1244 , G02F1/136259 , G02F2001/136263 , G02F2201/506 , H01L22/22 , H01L27/12 , H01L27/1262
Abstract: The present application discloses an array substrate including a first signal line layer having a plurality of rows of first signal lines; a second signal line layer having a plurality of columns of second signal lines; the plurality of rows of first signal lines crossing over the plurality of columns of second signal lines defining a plurality of subpixels; a first insulating layer and a second insulating layer between the first signal line layer and the second signal line layer; the first insulating layer on a side of the second insulating layer proximal to the first signal line layer; a repair line between the first insulating layer and the second insulating layer, the repair line corresponding to one of the plurality of columns of second signal lines; and a first via and a second via extending through the second insulating layer; the repair line being electrically connected to the corresponding one of the plurality of columns of second signal lines through the first via and the second via, respectively.
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公开(公告)号：US20250024705A1
公开(公告)日：2025-01-16
申请号：US18701887
申请日：2023-04-28
Inventor： Liusong Ni , Cheng Xu , Chen Xu , Ce Zhao , Ming Wang , Yingbin Hu , Ning Liu , Jiawen Song , Junlin Peng , Wei He
IPC: H10K59/121 , H10K59/12 , H10K59/123
Abstract: A display substrate is provided, including: pixel units on a base substrate; and a first conductive layer, a buffer layer, a semiconductor layer, a first insulation layer, and a second conductive layer which are arranged on the base substrate in a direction away from the base substrate. The display substrate further includes at least one conductive via hole passing through at least the first insulation layer, and at least one conductive plug through which the second conductive portion is electrically connected to the first conductive portion. The first conductive portion includes first and second conductive sub-portions, an orthographic projection of the first conductive sub-portion on the base substrate at least partially overlaps with that of the at least one conductive via hole on the base substrate, and in a third direction, a thickness of the first conductive sub-portion is greater than that of the second conductive sub-portion.
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公开(公告)号：US11846853B2
公开(公告)日：2023-12-19
申请号：US17361352
申请日：2021-06-29
Inventor： Qi Cao , Yong Shu , Xinlei Wang , Ming Wang , Nan Wang , Junjie Jiang , Xian Wang
IPC: G02F1/1362 , G06F1/16
CPC classification number: G02F1/136204 , G06F1/1658
Abstract: Provided are a display unit and a display apparatus, the display unit includes a back plate and a print circuit board disposed on the back plate, wherein the print circuit board is connected to the back plate through a screw, and is provided with a first electrostatic discharge region and a first electrostatic discharge unit; the first electrostatic discharge region is connected to the back plate through the screw to form a first electrostatic discharge channel, and the first electrostatic discharge unit is connected to the back plate to form a second electrostatic discharge channel.
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Patent Agency Ranking
公开(公告)号：US11804494B2
公开(公告)日：2023-10-31
申请号：US17349164
申请日：2021-06-16
Inventor： Haitao Wang , Jun Cheng , Ming Wang , Qinghe Wang , Jun Wang , Tongshang Su
CPC classification number: H01L27/124 , H01L27/0266 , H01L27/0288 , H01L27/127 , H01L27/1237 , H01L27/1255
Abstract: The disclosure discloses an array substrate and a preparation method thereof, a display panel and a display device. The array substrate includes: a substrate, and a first metal layer, a metal oxide layer and a second metal layer which are sequentially stacked and isolated from each other on the substrate; the first metal layer includes a light shading metal, a first electrode, and an anti-static line; the metal oxide layer includes a first active layer; the second metal layer includes a gate line and a second electrode; the gate line is connected with the anti-static line through a first TFT, one of the first electrode and the second electrode forms the source and drain electrodes of the first TFT, and the other forms the gate electrode of the first TFT; and the source is electrically connected with the gate line, and the drain is electrically connected with the anti-static line.
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公开(公告)号：US11616113B2
公开(公告)日：2023-03-28
申请号：US16966847
申请日：2020-01-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: H01L27/32 , G02F1/1362 , H01L51/56
Abstract: A method of manufacturing a display substrate includes: providing a base substrate; and forming a base insulating layer, a first conductive layer and an interlayer insulating layer that are sequentially stacked on top of one another at a side of the base substrate. The first conductive layer includes at least one break face, the base insulating layer includes a portion extending outward with respect to each of the at least one break face, and the break face and the corresponding portion extending outward constitute an unevenness portion having a stepped shape. The interlayer insulating layer covers at least the unevenness portion(s). Forming the interlayer insulating layer, includes: forming a first insulating sub-layer and a second insulating sub-layer that are sequentially stacked on top of one another; and forming one of the first insulating sub-layer and the second insulating sub-layer by curing a flowable insulating material.
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公开(公告)号：US11309428B2
公开(公告)日：2022-04-19
申请号：US16706160
申请日：2019-12-06
Inventor： Wei Song , Ce Zhao , Yuankui Ding , Ming Wang , Jun Liu , Yingbin Hu , Wei Li , Liusong Ni
IPC: H01L29/78 , H01L29/786 , H01L27/12 , H01L27/32
Abstract: The present disclosure provides a transistor and a manufacturing method thereof, a display substrate and a display device. The transistor includes: a base structure; an active layer on the base structure; and a gate electrode, a source electrode and a drain electrode that are all located on a side of the active layer distal to the base structure. The active layer includes a first region corresponding to an orthographic projection of the gate electrode on the base structure and a second region outside the orthographic projection. A surface of the base structure in contact with the active layer in the first region is not in the same plane as a surface of the base structure in contact with the active layer in the second region. The active layer in the first region has substantially the same thickness as a thickness of the active layer in the second region.
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公开(公告)号：US20220077255A1
公开(公告)日：2022-03-10
申请号：US17417334
申请日：2020-11-05
Inventor： Wei Li , Jingjing XIA , Bin Zhou , Yang Zhang , Guangyao Li , Wei Song , Xuanang Wang , Qinghe Wang , Liusong Ni , Jun Liu , Liangchen Yan , Ming Wang , Jingang Fang
Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, a display panel and a display device. The array substrate includes: a substrate; a planarization layer on a side of the substrate; a pixel defining layer configured to define a pixel opening region and located on a side of the planarization layer away from the substrate; an anode in the pixel opening region and on a side of the planarization layer away from the substrate. The array substrate further includes an intermediate insulation layer between the planarization layer and the pixel defining layer. The intermediate insulation layer has a chemical polarity between a chemical polarity of the planarization layer and a chemical polarity of the pixel defining layer.
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公开(公告)号：US11164523B2
公开(公告)日：2021-11-02
申请号：US16427879
申请日：2019-05-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ming Wang
IPC: G06F1/00 , G09G3/3258
Abstract: The present disclosure provides a compensation method and compensation apparatus for a pixel circuit, and a display apparatus. The compensation method for the pixel circuit includes: acquiring a threshold voltage of a driving transistor of the pixel circuit; comparing a source voltage of the driving transistor with the threshold voltage; and adjusting the source voltage of the driving transistor according to a comparison result.
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