发明授权
US09159818B2 High-current N-type silicon-on-insulator lateral insulated-gate bipolar transistor
有权
大电流N型绝缘体上半导体绝缘栅双极晶体管
- 专利标题: High-current N-type silicon-on-insulator lateral insulated-gate bipolar transistor
- 专利标题(中): 大电流N型绝缘体上半导体绝缘栅双极晶体管
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申请号: US14349632申请日: 2012-10-24
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公开(公告)号: US09159818B2公开(公告)日: 2015-10-13
- 发明人: Weifeng Sun , Siyang Liu , Jing Zhu , Qinsong Qian , Shen Xu , Shengli Lu , Longxing Shi
- 申请人: SOUTHEAST UNIVERSITY
- 申请人地址: CN Jiangsu
- 专利权人: SOUTHEAST UNIVERSITY
- 当前专利权人: SOUTHEAST UNIVERSITY
- 当前专利权人地址: CN Jiangsu
- 代理机构: Christensen Fonder P.A.
- 优先权: CN201210343012 20120914
- 国际申请: PCT/CN2012/083427 WO 20121024
- 国际公布: WO2014/040334 WO 20140320
- 主分类号: H01L27/24
- IPC分类号: H01L27/24 ; H01L29/739 ; H01L29/40 ; H01L27/12 ; H01L29/06 ; H01L27/06
摘要:
A high-current, N-type silicon-on-insulator lateral insulated-gate bipolar transistor, including: a P-type substrate, a buried-oxide layer disposed on the P-type substrate, an N-type epitaxial layer disposed on the oxide layer, and an N-type buffer trap region. A P-type body region and an N-type central buffer trap region are disposed inside the N-type epitaxial layer; a P-type drain region is disposed in the buffer trap region; N-type source regions and a P-type body contact region are disposed in the P-type body region; an N-type base region and a P-type emitter region are disposed in the buffer trap region; gate and field oxide layers are disposed on the N-type epitaxial layer; polycrystalline silicon gates are disposed on the gate oxide layers; and a passivation layer and metal layers are disposed on the surface of the symmetrical transistor. P-type emitter region output and current density are improved without increasing the area of the transistor.
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