发明授权
US08889511B2 Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor
有权
制造具有沟槽屏蔽分离栅晶体管的功率半导体器件的方法
- 专利标题： Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor
- 专利标题（中）： 制造具有沟槽屏蔽分离栅晶体管的功率半导体器件的方法
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申请号： US13219229申请日： 2011-08-26
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公开(公告)号： US08889511B2公开(公告)日： 2014-11-18
- 发明人: Joseph A. Yedinak , Nathan L. Kraft
- 申请人： Joseph A. Yedinak , Nathan L. Kraft
- 申请人地址： US ME South Portland
- 专利权人： Fairchild Semiconductor Corporation
- 当前专利权人： Fairchild Semiconductor Corporation
- 当前专利权人地址： US ME South Portland
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336 ; H01L29/06 ; H01L29/66 ; H01L21/3065 ; H01L29/40 ; H01L29/739 ; H01L21/683 ; H01L21/311 ; H02M3/335 ; H01L29/49 ; H01L23/498 ; H01L29/423 ; H01L29/165 ; H01L21/265 ; H02M3/00 ; H01L29/417 ; H02M7/48 ; H01L23/495 ; H01L29/10
摘要：
In one general aspect, a method can include forming a shield dielectric layer in a trench in a semiconductor substrate, forming a shield electrode on at least a portion of the shield dielectric layer, and etching the shield dielectric layer so that a portion of the shield dielectric layer is recessed in the trench. The method can include forming a gate dielectric layer on the recessed portion of the shield dielectric layer in the trench, forming a first conductive gate electrode on a first side of the shield electrode and insulated from a first sidewall of the trench by the gate dielectric layer, and forming a second conductive gate electrode on a second side of the shield electrode and insulated from a second sidewall of the trench by the gate dielectric layer.
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