- 专利标题: Semiconductor device, and method for manufacturing semiconductor device
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申请号: US17354500申请日: 2021-06-22
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公开(公告)号: US11862672B2公开(公告)日: 2024-01-02
- 发明人: Katsuhisa Nagao
- 申请人: ROHM CO., LTD.
- 申请人地址: JP Kyoto
- 专利权人: ROHM CO., LTD.
- 当前专利权人: ROHM CO., LTD.
- 当前专利权人地址: JP Kyoto
- 代理机构: XSENSUS LLP
- 优先权: JP 12054953 2012.03.12
- 主分类号: H01L29/872
- IPC分类号: H01L29/872 ; H01L29/06 ; G01R31/12 ; H01L29/78 ; H01L29/47 ; H01L21/78 ; H01L29/16 ; H01L21/66 ; H01L21/761 ; H01L29/40 ; G01R31/26
摘要:
[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.
[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.
[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.
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