Invention Grant
- Patent Title: Integrated circuit fin structure manufacturing method
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Application No.: US18065275Application Date: 2022-12-13
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Publication No.: US11861282B2Publication Date: 2024-01-02
- Inventor: Po-Hsiang Huang , Fong-Yuan Chang , Clement Hsingjen Wann , Chih-Hsin Ko , Sheng-Hsiung Chen , Li-Chun Tien , Chia-Ming Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- The original application number of the division: US16599552 2019.10.11
- Main IPC: G06F30/3312
- IPC: G06F30/3312 ; G06F30/367 ; G06F30/392 ; G06F30/398 ; H01L21/8238 ; H01L27/092 ; H01L29/66 ; H01L29/78 ; G06F111/20

Abstract:
A method of manufacturing an IC structure includes forming a first plurality of fins extending in a first direction on a substrate, a second plurality of fins extending adjacent to the first plurality of fins, a third plurality of fins extending adjacent to the second plurality of fins, and a fourth plurality of fins extending adjacent to the third plurality of fins. Each fin of the first and fourth pluralities of fins includes one of an n-type or p-type fin, each fin of the second and third pluralities of fins includes the other of the n-type or p-type fin, each of the first and third pluralities of fins includes a first total number of fins, and each of the second and fourth pluralities of fins includes a second total number of fins fewer than the first total number of fins.
Public/Granted literature
- US20230113014A1 INTEGRATED CIRCUIT FIN STRUCTURE MANUFACTURING METHOD Public/Granted day:2023-04-13
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