- Patent Title: Leakage current reduction in polysilicon-on-active-edge structures
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Application No.: US16831010Application Date: 2020-03-26
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Publication No.: US11444201B2Publication Date: 2022-09-13
- Inventor: Youn Sung Choi , Kwanyong Lim , Youseok Suh , Hyunwoo Park
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Patterson+ Sheridan, L.L.P. Qualcomm
- Main IPC: H01L21/82
- IPC: H01L21/82 ; H01L29/78 ; H01L29/66 ; H01L29/10 ; H01L21/8234 ; H01L27/088
Abstract:
Certain aspects of the present disclosure generally relate to techniques for reducing leakage current in polysilicon-on-active-edge structures. An example transistor structure includes one or more active devices and at least one dummy device disposed at an edge of the transistor structure, wherein the at least one dummy device has a different gate structure than the one or more active devices.
Public/Granted literature
- US20210305429A1 LEAKAGE CURRENT REDUCTION IN POLYSILICON-ON-ACTIVE-EDGE STRUCTURES Public/Granted day:2021-09-30
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