Invention Grant
- Patent Title: Frequency multiplier and delay-reused duty cycle calibration method thereof
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Application No.: US17241044Application Date: 2021-04-26
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Publication No.: US11387813B2Publication Date: 2022-07-12
- Inventor: Hsiu-Hsien Ting , Po-Chun Huang , Yu-Li Hsueh
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K5/00 ; H03K19/20 ; G06F1/08

Abstract:
A frequency multiplier and a delay-reused duty cycle calibration method thereof are provided. The frequency multiplier includes a first calibration circuit, a second calibration circuit and a controller. In a calibration mode of the frequency multiplier, an output terminal of a delay cell is coupled to an input terminal of the delay cell. The first calibration circuit repeatedly uses the delay cell M times for generating a first delayed signal. The controller controls the delay cell according to the first delayed signal, to find a delay of the delay cell which makes M times the delay be equal to one cycle period of an input clock signal. After the delay is found, the delay cell is repeatedly used M/2 times for generating a second delayed signal. The controller controls the second calibration circuit according to the second delayed signal to make an input calibration signal have a target duty cycle.
Public/Granted literature
- US20220069809A1 FREQUENCY MULTIPLIER AND DELAY-REUSED DUTY CYCLE CALIBRATION METHOD THEREOF Public/Granted day:2022-03-03
Information query
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