- 专利标题： Via structure with low resistivity and method for forming the same
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申请号： US16907781申请日： 2020-06-22
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公开(公告)号： US11081585B2公开(公告)日： 2021-08-03
- 发明人: Kuo-Chiang Tsai , Fu-Hsiang Su , Ke-Jing Yu , Chih-Hong Hwang , Jyh-Huei Chen
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Birch, Stewart, Kolasch & Birch, LLP
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/66 ; H01L29/423 ; H01L29/417 ; H01L21/48 ; H01L21/768 ; H01L23/522
摘要：
A semiconductor device structure is provided. The semiconductor device structure includes an insulating layer over a substrate, a gate stack formed in the insulating layer, and an insulating capping layer formed in the insulating layer to cover the gate stack. The semiconductor device structure also includes a source/drain contact structure adjacent to the gate stack. The source/drain contact structure has a sidewall that is in direct contact with a sidewall of the insulating capping layer, and an upper surface that is substantially level with an upper surface of the insulating capping layer and an upper surface of the insulating layer. In addition, the semiconductor device structure includes a first via structure above and electrically connected to the gate stack and a second via structure above and electrically connected to the source/drain contact structure.
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