发明授权
- 专利标题: Method for fabricating junctions and spacers for horizontal gate all around devices
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申请号: US15687747申请日: 2017-08-28
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公开(公告)号: US10177227B1公开(公告)日: 2019-01-08
- 发明人: Naomi Yoshida , Lin Dong , Shiyu Sun , Myungsun Kim , Nam Sung Kim , Dimitri Kioussis , Mikhail Korolik , Gaetano Santoro , Vanessa Pena
- 申请人: Applied Materials, Inc.
- 申请人地址: US CA Santa Clara
- 专利权人: Applied Materials, Inc.
- 当前专利权人: Applied Materials, Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Patterson + Sheridan, LLP
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L29/06 ; H01L29/417 ; H01L29/786 ; H01L29/66 ; H01L29/423 ; H01L29/78
摘要:
The present disclosure provides methods for forming horizontal gate-all-around (hGAA) structure devices. In one example, a method includes selectively and laterally etching a first group of sidewalls of a first layer in a multi-material layer, wherein the multi-material layer comprises repeating pairs of the first layer and a second layer, the first and the second layers having the first group and a second group of sidewalls respectively, the first group of sidewalls from the first layer exposed through openings defined in the multi-material layer and a group of inner spacers formed atop of the second group of sidewalls from the second layer, forming a recess from the first group of sidewalls of the first layer and defining a vertical wall inward from an outer vertical surface of the inner spacer formed atop of the second layers, and forming an epi-silicon layer from the recess of the first layer.
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