Invention Grant
- Patent Title: MOSFET active area and edge termination area charge balance
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Application No.: US15339678Application Date: 2016-10-31
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Publication No.: US10084037B2Publication Date: 2018-09-25
- Inventor: Qufei Chen , Kyle Terrill , Sharon Shi
- Applicant: VISHAY-SILICONIX
- Applicant Address: US CA Santa Clara
- Assignee: VISHAY-SILICONIX
- Current Assignee: VISHAY-SILICONIX
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L29/78 ; H01L29/40 ; H01L29/167 ; H01L29/10

Abstract:
A method for fabricating a MOSFET having an active area and an edge termination area is disclosed. The method includes forming a first plurality of implants at the bottom of trenches located in the active area and in the edge termination area. A second plurality of implants is formed at the bottom of the trenches located in the active area. The second plurality of implants formed at the bottom of the trenches located in the active area causes the implants formed at the bottom of the trenches located in the active area to reach a predetermined concentration. In so doing, the breakdown voltage of both the active and edge termination areas can be made similar and thereby optimized while maintaining advantageous RDson.
Public/Granted literature
- US20170117354A1 MOSFET ACTIVE AREA AND EDGE TERMINATION AREA CHARGE BALANCE Public/Granted day:2017-04-27
Information query
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