The invention relates to an SOI-based strained-Si-channel inverted-trapezoid-grid CMOS integrated device and a preparation method thereof. The preparation method comprises: selecting an SOI substrate; growing a P type SiGe layer and an N type strained Si layer to form an NMOS active region and a PMOS active region; carrying out etching process to form an isolated groove; carrying out an ion implantation process on the surface of the NMOS active region to form a P type well region; carrying out photoetching on the surface of the NMOS active region to form an NMOS grid region pattern and carrying out processing by a particle beam etching process to form a first dual-trapezoid groove; carrying out photoetching on the surface of the PMOS active region to form a PMOS grid region pattern and carrying out processing by a particle beam etching process to form a second dual-trapezoid groove; growing an oxidation layer to form an NMOS gate dielectric material and a PMOS gate dielectric material; carrying out etching on the PMOS gate dielectric material and forming PMOS source and drain regions by using an ion implantation process and carrying out etching on the NMOS gate dielectric material and forming NMOS source and drain regions by using an ion implantation process; growing a grid material to form an NMOS grid electrode and a PMOS grid electrode; and carrying out metallization processing and carrying out drain lead, source lead, and grid lead photoetching to form an SOI-based strained-Si-channel inverted-trapezoid-grid CMOS integrated device.