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发明公开
CN102945847A 具有对芯片内部低噪声干扰的静电放电防护电路 无效 - 撤回

具有对芯片内部低噪声干扰的静电放电防护电路
摘要：
本发明提供一种具有对芯片内部低噪声干扰的静电放电防护电路。该静电放电防护电路设置在芯片中，该芯片还包括：主电路及连接所述主电路的第一电源端及第一接地端；所述静电放电防护电路至少包括：连接所述主电路的静电放电防护电路单元；连接所述静电放电防护电路单元的第二电源端及第二接地端；以及多条邦定线，分别将所述第一电源端连接至第一电源引脚、第一接地端连接至第一接地引脚、所述第二电源端连接至第二电源引脚、第二接地端连接至第二接地引脚。本发明的优点包括：能有效降低主电路所受到的噪声干扰。
摘要（英）：

The invention provides an electrostatic discharge protective circuit with low-noise interference for the interior of a chip. The electrostatic discharge circuit protective circuit is arranged in the chip, the chip comprises a main circuit, and a first power supply end and a first ground end which are connected with the main circuit; the electrostatic discharge protective circuit at least comprises an electrostatic discharge protective circuit unit connected with the main circuit, a second power supply end and a second ground end which are connected with the electrostatic discharge protective circuit, and a plurality of bonding lines used for respectively connecting the first power supply end to a first power supply pin, connecting the first ground end to a first ground pin, connecting the second power supply end to a second power supply pin, and connecting the second ground end to a second ground pin. The electrostatic discharge protective circuit with the low-noise interference for inside of the chip has advantage that the noise interference caused to the main circuit can be effectively reduced.

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