US09344058B2
A resonator element includes a base portion and a pair of vibrating arms that are provided integrally with the base portion, are aligned in an X-axis direction, and extend in a Y-axis direction from the base portion. Each of the vibrating arms includes an arm portion and a wide hammerhead that is located on the free end side of the arm portion and has a greater length in the X-axis direction than the arm portion. Assuming that the length of the vibrating arm in the Y-axis direction is L and the length of the hammerhead in the Y-axis direction is H, the relationship of 1.2%
US09344053B2
The present invention relates to an output stage for adapting an AC voltage signal of an ultrasound generator to a converter connectable to the output stage, wherein the output stage has two input terminals for receiving the AC voltage produced by the ultrasound generator and two output terminals for outputting an adapted AC voltage, as well as an output transformer with a primary coil having a number n1 turns and a secondary coil with a number n2 turns, the output transformer having a main inductance LH as well as a leakage inductance Lσ, the two input terminals being connected to one another via the primary coil and the two output terminals being connected to one another via the secondary coil. In order to disclose an output transformer, which allows an economical and uncomplicated adaptation of a generator output to the converter input, it is proposed according to the invention that a filter capacitor CP is provided, which either connects the two output terminals in parallel to the secondary coil or connects an output terminal to a tap of the secondary coil or is connected to a filter coil with n3 turns, which is inductively coupled to the primary and the secondary coil.
US09344048B1
An operational amplifier comprises an input pair, an aiding unit, an even number of amplification stages, a feeding unit, a first current source, a second current source. Both the input pair and the aiding unit are connected to the first current source. The input pair receives differential input voltage. Both the input pair and the aiding unit are further connected to a first stage of the even number of amplification stages. The even number of amplification stages are connected in series, and the last stage of the amplification stages outputs differential output voltages. The feeding unit is configured to receive a common mode voltage of the differential output voltages, and feeds a voltage on a first node of the feeding unit back to the aiding unit so as to provide bias voltage to the aiding unit. The aiding unit avoids dead lock of the input pair.
US09344045B2
An amplifier includes a differential input with a positive and a negative input and an analog integrator with a differential integrator input and a differential integrator output. The analog integrator further includes an operational amplifier with a positive operational amplifier input, a negative operational amplifier input, a positive operational amplifier output and a negative operational amplifier output. The differential integrator input is coupled to the differential input. A ternary pulse width modulator includes two modulator inputs coupled to the differential integrator output and two modulator outputs. A first feedback path is coupled between a first of the two modulator outputs and the positive operational amplifier input and a second feedback path is coupled between a second of the two modulator outputs and the negative operational amplifier input. A first divert capacitor is coupled between the positive operational amplifier input and a constant voltage reference. A second divert capacitor is coupled between the negative operational amplifier input and the constant voltage reference.
US09344038B2
Exemplary embodiments are related to a tri-phase digital polar modulator. A device may include a modulator configured to generate a primary phase modulated signal including the most significant bits (MSBs) of a modulated signal, a leading phase modulated signal including a first least significant bits (LSB) of the modulated signal, and a lagging phase modulated signal including a second LSB of the modulated signal. The device may also include a combination unit configured to add the primary phase modulated signal, the leading phase modulated signal, and the lagging phase modulated signal.
US09344037B2
Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor.
US09344035B2
In accordance with an embodiment, an oscillator includes a tank circuit and an oscillator core circuit having a plurality of cross-coupled compound transistors coupled to the tank circuit. Each of the plurality of compound transistors includes a bipolar transistor and a field effect transistor (FET) having a source coupled to a base of the bipolar transistor.
US09344030B2
A solar cell module is configured from a solar cell panel, and a frame structural body. The frame structural body is provided with: a plurality of frame members which are provided to peripheral edges of the solar cell panel, and which have a cross-sectional shape having a hollow portion; corner members which are provided in the hollow portions; holding sections which are provided in the hollow portions, and which hold the corner members; and a plurality of formed rivet sections which apply pressure to the frame members.
US09344027B2
A method for pre-charging a motor drive system includes: pre-charging a motor drive through a motor DC bus where desired, pre-charging an add-on capacitive module through a resistor after a time delay, pre-charging the add-on capacitive module and bypassing the resistor, and disconnecting the add-on capacitive module from the motor DC bus when a fault condition has been detected.
US09344021B2
An inverter circuit electrically connects between a high-voltage bus and a multi-phase electric machine, including a plurality of switch pairs. Each switch pair includes a first switch electrically connected in series with a second switch at a node. Each node electrically connects to a phase of the multi-phase electric machine with the first switch electrically connected between a positive side of the high-voltage bus and the node and the second switch electrically connected between a negative side of the high-voltage bus and the node. The first switch is configured as a normally-OFF switch. The second switch is configured as a normally-ON switch.
US09344014B2
Piezoelectric harvesting devices are disclosed herein. An embodiment of a harvesting device includes a cantilever having a resonant frequency associated therewith, wherein the cantilever vibrates when in the presence of a vibration source, and wherein the harvesting device generates a current upon vibration of the cantilever. The generated current is present at an output. A bias flip circuit is used to tune the resonant frequency of the harvesting device based on measurements of the vibration source that causes the cantilever to vibrate, wherein the bias flip circuit includes a switch that connects and disconnects an inductor to the output.
US09343998B2
A two-wire load control device (such as, a dimmer switch) for controlling power delivered from an AC power source to an electrical load (such as, a high-efficiency lighting load) includes a thyristor coupled between the source and the load, a first circuit coupled between a first main terminal and a gate terminal of the thyristor to conduct current through the gate terminal, a second circuit coupled between the first main terminal and a second main terminal of the thyristor to conduct current through the load when the thyristor is non-conductive, and a control circuit configured to individually control the first and second circuits. The control circuit renders the first circuit conductive to conduct a pulse of current through the gate terminal to render the thyristor conductive at a firing time, and allows the first circuit to conduct at least one other pulse of current through the gate terminal after the firing time.
US09343986B2
In a power converter, a driver drives a switching element using a manipulated variable therefor to convert input power into output power. A first measuring unit measures a value of a first electric parameter depending on the input power. A first determiner determines, from the measured value of the first electric parameter, a first feedback controlled variable. A second measuring unit measures a value of a second electric parameter indicative of the output power, and a calculator calculates, based on the measured value of the second electric parameter and a command value for the second electric parameter, a second feedback controlled variable. A selector selects, based on the measured value of the first electric parameter, one of the first feedback controlled variable and the second feedback controlled variable. A second determiner determines the manipulated variable using the selected one of the first and second feedback controlled variables.
US09343983B2
A controller for generating jitters in a constant current mode of a power converter includes a current pin, an auxiliary pin, a constant current control unit, and a control signal generation unit. The current pin is used for receiving a primary side voltage determined according to a resistor and a primary side current flowing through the power converter. The auxiliary pin is used for receiving a voltage corresponding to an auxiliary winding of the power converter. The constant current control unit is used for generating an adjustment signal according to the primary side voltage, a discharge time corresponding to the voltage, and a reference voltage. The reference voltage has a predetermined range jitter voltage. The control signal generation unit is used for adjusting a period of a gate control signal according to the adjustment signal.
US09343979B2
System and method for regulating a power converter. The system includes a first signal processing component configured to receive at least a sensed signal and generate a first signal. The sensed signal is associated with a primary current flowing through a primary winding coupled to a secondary winding for a power converter. Additionally, the system includes a second signal processing component configured to generate a second signal, an integrator component configured to receive the first signal and the second signal and generate a third signal, and a comparator configured to process information associated with the third signal and the sensed signal and generate a comparison signal based on at least information associated with the third signal and the sensed signal.
US09343972B2
A power supply includes a rectification unit configured to be able to switch a rectification method between a voltage doubler rectification method and a full-wave rectification method according to an input alternating voltage, two capacitive elements serially connected between lines from the rectification unit, a monitoring unit configured to monitor a first voltage applied between the lines between which the two capacitive elements are connected and a second voltage applied across one of the capacitive elements that is connected to a lower potential side of the lines, and a switch configured to operate according to the second voltage, wherein the power supply interrupts the alternating voltage according to an operating state of the switch, the first voltage, and the second voltage.
US09343970B2
A converter and method for reducing voltage of node thereof are disclosed herein. The converter includes a first transmitting circuit and a second transmitting circuit. The first transmitting circuit is configured to receive a first AC voltage. The second transmitting circuit is electrically coupled to the first transmitting circuit and the second transmitting circuit is configured to transmit a second AC voltage according to the first AC voltage. One of the first transmitting circuit and the second transmitting circuit includes at least one divider unit and the other one of the first transmitting circuit and the second transmitting circuit includes at least two divider units. Each of the divider units includes an inductor network and a capacitor network coupled in series. The inductor network and the capacitor network of the adjacent divider units are coupled in series alternately.
US09343969B2
A control circuit for controlling a switching transistor and a synchronous rectifying transistor of a switching regulator includes: a bottom detection comparator configured to assert an on signal; a timer circuit configured to generate an off signal; a zero current detector configured to assert a zero current detection signal; and a driving circuit configured to receive the on signal, the off signal and the zero current detection signal, and (i) turn on the switching transistor and turn off the synchronous rectifying transistor when the on signal is asserted, (ii) turn off the switching transistor and turn on the synchronous rectifying transistor when the off signal is asserted, and (iii) turn off the switching transistor and the synchronous rectifying transistor when the zero current detection signal is asserted.
US09343968B2
A time off estimator and an adaptive controller implemented on an integrated circuit to emulate current dependent zero crossing circuitry to permit improved performance of a buck type switching mode power supply. The time off estimator circuit is enhanced by an automatic correction circuit for the timing of a zero crossing where energy to a reference capacitor returns to zero and is turned off awaiting the next cycle where the capacitor is again charged and discharged.
US09343967B2
An apparatus comprises a switching power circuit and a control circuit. The switching power converter circuit includes an output port for electrical coupling to a variable load, an input port for electrically coupling to a first energy source, wherein the energy density of the first energy source is insufficient to meet a peak energy requirement of the variable load, an input/output port for electrical coupling to a second energy source, and one inductor electrically coupled to the input port and a circuit node, wherein the electrical coupling is non-switchable. The control circuit is configured to charge the inductor using the first energy source via the input port, to provide energy from the inductor to the load via the output port, and to provide both of, via the input/output port, energy from the inductor to the second energy source and energy from the second energy source to the variable load.
US09343963B2
A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
US09343957B1
A multi-converter system includes a first converter configured to receive an input voltage and output a first PWM switching signal based on the input voltage. A power distribution balancing circuit is configured to detect a frequency of the first PWM switching signal and generate a control signal based on the frequency of the first PWM switching signal. A second converter is configured to receive the input voltage and output a second PWM switching signal in response to the control signal. An output voltage node is configured to output an output voltage based on the first and second PWM switching signals.
US09343956B2
A passive power factor correction circuit includes: a DC capacitor and an input capacitor, coupled to a rectifying circuit and charged by a DC voltage from the rectifying circuit; an output capacitor, coupled to a load; first diode and a second diode, coupled to the input capacitor and the output capacitor; and an inductor, coupled to the load, the input capacitor and the output capacitor. Charging into and discharging from the DC capacitor are completed within a half cycle of an input AC voltage.
US09343949B2
Several circuits and methods for driver control of a switching circuit are disclosed. In an embodiment, a circuit for driver control of a switching circuit includes a driver circuit and a control circuit. The driver circuit is capable of being coupled to the switching circuit. The switching circuit includes a first switch and a second switch. The driver circuit is configured to control a conductive state of the switching circuit by facilitating an alternate state change of the first switch and the second switch. The control circuit is coupled to the driver circuit and is configured to detect a noise signal during a state change of the first switch. The control circuit is further configured to control the driver circuit to thereby slow down the state change of the first switch.
US09343944B2
A stator for an electric rotary machine includes: a stator core having a plurality of slots; and segmented coils of a plurality of phases, wherein: the segmented coils of a plurality of phases have pluralities of coil bars which are inserted individually in the plurality of slots in the stator core and which extend substantially in a straight line and pluralities of connection coils which connect together the coil bars of the same phase to thereby make up extending portions; and the coil bars are fixed in place individually in the slots in the stator core in such a state that the coil bars each are covered by an insulation material.
US09343937B2
In a rotary electric machine having a rotor core of a skew structure, when one of the core blocks is sequentially stacked on the other of the core blocks to form a step skew, a communication reference groove is formed along an axial direction of the rotor core by aligning a side section of a short protruding section in one core block with a side section of the long protruding sections in the other core block, and by aligning a side section of a long protruding section in one core block with a side section of a short protruding section in the other core block. The core blocks are correctly stacked by aligning the side section of the long protruding sections with the side section of the short protruding sections.
US09343936B2
A rotor for an electric machine has a rotor member extending circumferentially about the axis of rotation of the rotor, and a locking device in an axial end region of a guide to mount permanent magnets in the direction of the axis of rotation of the rotor. The locking device is retained on the rotor member in the radial direction and in the direction of rotation of the rotor by guides. The locking device has a movable movement element and is designed such that when the movement element is moved, the locking device is positively or non-positively connected to the rotor member.
US09343933B2
A rotating electric machine includes a rotor including: a rotor core divided into blocks in an axial direction, the blocks being arranged to have a phase angle therebetween in a circumferential direction, the rotor core having magnet through holes arrayed in the circumferential direction and formed in an outer circumferential region; and permanent magnets inserted into the magnet through holes. The magnet through hole includes: a magnet insertion portion into which the permanent magnet is inserted; and a non-magnetic portion provided on an outer side of the magnet insertion portion in the circumferential direction. A bridge portion is formed between the outer circumferential surface and an outer circumferential inner wall of the non-magnetic portion. A bridge angle, which is an angle between both circumferential ends of the bridge portion with a rotation center of the rotor core set as a vertex, is larger than a skew angle.
US09343932B2
A motor is disclosed, the motor including a housing, a stator mounted on the housing, and including a stator core having a plurality of teeth, an insulator and a coil, a rotor core rotatatively disposed at a center of the stator and centrally having a space unit, and a magnet module mounted on a surface of the rotor core, wherein the magnet module includes a plurality of magnets each having a predetermined size, and a guide plate having an embossed unit accommodated by the plurality of magnets and attached to an inner surface of the magnet.
US09343930B2
A stator has a plurality of segments connected with connectors to define a core for the stator. Each of the segments comprises a plurality of laminations arranged side by side forming a lamination stack with axially opposite sides. The lamination stack has an end cap abutting an axial side of the lamination stack. The end cap has first and second posts extending axially therefrom. At least one of the posts defines a wire path for wire wound around the stack. Each of the connectors comprises a bridge portion. The bridge portion has openings dimensioned to receive the posts in a manner that the connector is removably attachable to the post of the end cap of a segment and the post of the end cap of an adjacent segment. The connector has an insulator portion projecting from the bridge portion. The insulator portion extends between adjacent segments.
US09343926B2
Residential system includes photovoltaic power system including solar battery, and electrical storage device including battery. Electric load of residential system is selectively supplied with energy from power supply system, power generator and electrical storage device. Power generator allows energy to flow back to power supply system. Energy surplus judgment part calculates difference between generating energy of power generator and demand power for electric load (excess generating energy). Overall operation controller applies stored energy in electrical storage device to demand energy for electric load when excess generating energy is produced, and charges electrical storage device without applying generating energy of power generator to demand energy when excess generating energy is not produced.
US09343925B1
An electrical power distribution apparatus that is configured to selectively communicate power from alternate power sources to one or more loads in a manner that maintains isolation of the input power derived from the alternate sources. The electrical power distribution apparatus includes a neutral input for connecting to a neutral output of the auxiliary power supply and a ground conductor for connecting a ground conductor of the auxiliary power supply. The apparatus includes an electrical bus that receives electrical power from a first electrical output of the auxiliary power supply and unswitchably communicates the first electrical output to a breaker connected to a load.
US09343922B2
A wireless energy transfer enabled battery includes a resonator that is positioned asymmetrically in a battery sized enclosure such that when two wirelessly enabled batteries are placed in close proximity the resonators of the two batteries have low coupling.
US09343918B2
According to an example embodiment, a balancing apparatus includes: bi-directional switches that are respectively connected to cells that are connected in series, a controller configured to measure voltages of the cells, and a multiwinding transformed connected to the bi-directional switches. The bi-directional switches are configured to control a flow of an electric current bi-directionally. The controller is configured to select a number of the cells for balancing based on the measured voltages of the cells. The controller is configured to turn on and turn off the bi-directional switches that are connected to selected cells based on the measured voltages. The multi-winding transformer is configured to transfer energy between the cells when the bi-directional switches connected to the selected cells are turned on.
US09343917B2
A charging circuit for charging a battery is provided. A power supplier has a communication interface coupled to a cable for receiving command-data and generates a DC voltage and a DC current in accordance with the command-data. A controller is coupled to the battery for detecting a battery-voltage and generates the command-data in accordance with the battery-voltage. A switch is coupled to the cable for receiving the DC voltage and the DC current through a connector. The DC voltage and the DC current generated by the power supply are coupled to the cable, and the DC voltage and the DC current are programmable in accordance with the command-data. The command-data generated by the controller is coupled the cable through a communication circuit of the controller. The controller is coupled the connector for detecting a connector-voltage and control an on/off state of the switch in response to the connector-voltage.
US09343912B2
A charging device that includes a first battery charged at a first rate and a second battery that is charged at a second rate, which is faster than the first rate. The charging device includes an interface that receives electric power from a charger; a first switch disposed between the interface and the first battery; a second switch disposed between the second battery and the first battery; a battery voltage detection circuit that detects a voltage of the second battery; a charger detection circuit connected to the interface that detects whether power is being received from the charger; and a switch control circuit that controls the first switch and the second switch based on outputs of the charger detection circuit and the battery voltage detection circuit.
US09343910B2
A system includes a primary transmission power supply 1 that provides single frequency power; a transmitter-receiver having plural channels of transmitting antennas 5 that wirelessly transmit power provided from the primary transmission power supply 1 and plural channels of receiving antennas 6 that receive the power transferred from the paired transmitting antennas 5; plural channels of transmission power circuits 2 that establish resonance conditions of the paired transmitting antennas; and plural channels of receiving power circuits 4 that establish resonance conditions of the paired receiving antennas, in which the individual transmission power circuits 2 provide the transmitting antennas 5 of adjacent channels with powers with half-wave resonance waveforms that avoid a period during which the power waves overlap on each other by shifting a phase of voltage or current of the powers.
US09343908B2
A power transmitting apparatus which has a power transmitting antenna, and transfers power from the power transmitting antenna to a power receiving antenna. The power transmitting apparatus includes a storage unit configured to be associated with a position of the power receiving antenna, and to store a parameter for controlling a resonance frequency of the power transmitting antenna; a determination unit configured to determine the position of the power receiving antenna; and a control unit configured to control the resonance frequency of the power transmitting antenna based on the position of the power receiving antenna.
US09343895B2
A protection feature is disclosed for a self powered protection relay having, for example, sensitive earth fault protection. Protection can be achieved in tandem with optimal power on trip time and with integrated logic for inrush discrimination. The self supplied protection relay can include a current processing module to measure and evaluate line current to generate a trip signal, and to suppress inrush current to block earth fault detection during an inrush condition and thereby increase sensitivity of fault detection.
US09343893B2
A device and a method for a field expansion. A support core (30) is inserted into the device by a field expansion apparatus. The field expansion apparatus has a pressure applying means (20) defining a radially expandable inner surface and a flat surface radially outwardly extending from the radially expandable inner surface. The device comprises an elastomeric tubing (10) and an adapter (40). The elastomeric tubing (10) has a forward end opposite a rearward end and an axial bore extending therethrough configured to receive the support core (30). The adapter (40) has a step portion (41) defined by a radial outer surface (42) and a flat surface (43) radially outwardly extending from the radial outer surface (42), and an axial bore (44) extending therethrough. The axial bore (44) has a diameter substantially the same as the diameter of the axial bore (12) of the elastomeric tubing (10). The adapter (40) is positioned substantially coaxially with the elastomeric tubing (10) between the pressure applying means (20) and the elastomeric tubing (10) such that, in response to inserting the support core (30) from the rearward end into the elastomeric tubing (10), the flat surface of the adapter (40) is pushed against the flat surface of the pressure applying means (20) by the elastomeric tubing (10); the interface between a rearward end of the adapter (40) and the forward end of the elastomeric tubing (10) is of high friction so that the adapter (40) and the elastomeric tubing (10) expand radially in unison, and the radial outer surface of the adapter (40) exerts a radially outward pressure against the radially expandable inner surface of the pressure applying means (20). device and method for field expansion device and method for field expansion.
US09343888B2
An automatic reeling mechanism for an electric vehicle or a charging post can automatically reel a charging cable and thus protect it against dirt and weather. In order to reduce mechanical loads and damage to the plug and minimize a risk for stumbling to a person, the automatic reeling mechanism is switched in a passive mode as long as a plug of the charging cable is plugged in and is not touched by a person. This is the case during the charging process. In this way, the automatic reeling mechanism can be comfortably used because no traction forces are active during the charging process and the charging cable can be laid out so that there is no risk of stumbling.
US09343887B2
An apparatus and method is provided for inhibiting theft of electrical wiring through the access opening of the frangible base of a highway utility pole, such as a light pole. Prior to securing the pole to the frangible base, a hollow body having an upper flange is inserted into the base so the flange is positioned on the upper surface of the frangible base. The electrical power supply cable is run up through the center of the hollow body and clamped to the hollow body and/or to a theft protection device used for a utility pole with a standard base. The electrical connection cable from the pole's electrical fixture is then attached to the power supply cable, and the pole and the hollow body are secured to the base by fastening means.
US09343881B2
A gas-insulated switchgear assembly is provided that includes a housing having an interior containing insulating gas. A disconnector is disposed in the housing and includes a movable contact, as well as fixed contacts that are spaced apart and arranged linearly in a direction perpendicular to a wall of the housing. The movable contact has a colored or topographical marking and is linearly movable among a plurality of positions. The wall of the housing is provided with an inspection window that permits a person to see the colored or topographical marking in relation to the fixed contacts, thereby permitting the person to determine the position of the movable contact.
US09343878B2
A metallic shell extends in the direction of an axial line and has a threaded portion on its outer circumferential surface for threading engagement with a mounting hole of a combustion apparatus. A process of manufacturing the metallic shell includes a step of forming a metallic shell tubular intermediate having the first tubular portion and the second tubular portion and a rolling step of forming the threaded portion on the metallic shell tubular intermediate. In the rolling step, a bearing member is inserted into the metallic shell tubular intermediate for nipping the metallic shell tubular intermediate in cooperation with working surfaces of the rolling dies, and rolling is performed simultaneously on at least the first tubular portion and the second tubular portion.
US09343872B2
An optical amplification device includes: a port group that has a plurality of ports that have a semiconductor optical amplifier and a port that does not have a semiconductor optical amplifier, an optical burst signal being input into each of the ports at a different timing; and a control unit, wherein: when an optical inputting into the port that has the semiconductor optical amplifier is detected, the control unit activates the semiconductor optical amplifier of the port where the optical inputting is detected, inactivates the other semiconductor optical amplifier and remains an activation until another optical inputting is detected in another semiconductor optical amplifier; and when an optical inputting into the port that does not have the semiconductor optical amplifier is detected, the control unit inactivates the semiconductor optical amplifiers of the plurality of the ports that have the semiconductor optical amplifier.
US09343861B2
A communication module adaptor adapted for mating with a device connector of a smart electronic device includes an adaptor circuit having a communication module and an adaptor connector coupled to the adaptor circuit. The communication module has a mating interface differing from a mating interface of the device connector such that the communication module is unable to directly connect to the device connector. The adaptor connector has a mating interface complementary to the mating interface of the device connector for mating with the device connector to electrically connect the communication module adaptor to the smart electronic device. The adaptor circuit electrically connects the adaptor connector and the communication module and control signals are transmitted from a controller of the communication module to the device connector of the smart electronic device via the adaptor connector.
US09343843B2
An electrical connector (100) includes an insulative housing (1), a number of contacts (2) retained in the insulative housing, a metal shell (4) covering the insulative housing, and an insulative cover (5) molded over the metal shell and integral with the insulative housing. A diffusion layer (6) is formed between the metal shell and the insulative cover. Chemical reaction is generated from metal and resin in the diffusion layer.
US09343842B2
A connector includes a housing which accommodates terminals connected to end portions of wires therein and which has locking pawls on an exterior surface of the housing; a rear holder having locking frames which are locked with or unlocked from the locking pawls by elastic deformation, in which the rear holder is mounted on a back side of the housing, and prevents rubber plugs that contact an outer periphery of the wires from dropping off the housing; and a shield shell mounted on an outer periphery of the housing to which the rear holder has been mounted. The shield shell includes a rear end portion which is arranged at an elastic deformation region of the locking frames in an assembling process of the rear holder to the housing and obstructs the elastic deformation of the locking frames.
US09343839B2
Certain types of wall-mount boxes provide a local power receptacle in a first interior region that is physically isolated from a second interior region. The local power receptacle is accessible from an exterior of the box. The local power receptacle is electrically connected to an internal connector interface that is accessible from the second interior region. An electronic device may be installed in the second interior region and electrically connected to the local power receptacle via the internal connector interface. Second receptacles are disposed in the second interior region and coupled to (or are integral with) the electronic device. The second receptacles are accessible from the exterior of the box.
US09343834B2
A disclosed header connectable to a receptacle includes a first contact including a pair of first plate portions, which are electrically conductive and are separated by an interval, and a plate-like conductive member which is conductive and is accommodated between the pair of first plate portions.
US09343825B2
A shield connector (10) includes a housing (20) and first and second terminals (50, 60) accommodated in the housing (20). The housing (20) includes first recesses (17) for positioning first connecting portions (51) in a rotation stop state by having first protrusions (52) fitted therein, second recesses (18) for positioning second connecting portions (61) in a rotation stop state by having second protrusions (62) fitted therein and terminal connecting portions (13) to which the first and second connecting portions (51, 62) are to be connected by coaxially arranging first bolt holes (54) and second bolt holes (64) as the first and second connecting portions are positioned.
US09343823B2
A fastener for a connector in an electrical coupling including a threaded bolt, a keeper member and a biasing member. The keeper member having a base and a distal member spaced apart from each other and a collapsible portion coupling the base and the distal member to each other in electrical communication. The second end of the threaded bolt extends to the base and is in electrical communication therewith. The distal member has a conductor contact surface. The biasing member includes an inner washer, an outer washer, and a Belleville washer positioned therebetween. The biasing member is insertable between the base and the distal member so that the inner washer is positioned between the base and the Belleville washer and the outer washer is positioned between the Belleville washer and the distal member. The collapsible portion provides an electrical shunt around the biasing member.
US09343811B2
The present invention discloses a phase adjustment apparatus. The phase adjustment apparatus includes at least two phase adjustment units, a switching apparatus, and a driving apparatus; where the at least two phase adjustment units are configured to modulate a phase; the driving apparatus is configured to drive the at least two phase adjustment units to move; the at least two phase adjustment units are selectively connected to the driving apparatus; and the switching apparatus is configured to select the at least two phase adjustment units, so that the driving apparatus drives, at a same moment, only one of the at least two phase adjustment units connected to the driving apparatus to move, so as to change a phase. The present invention discloses a multi-frequency antenna which applies the phase adjustment apparatus. The phase adjustment apparatus of the present invention may adjust a downtilt angle of an antenna unit.
US09343804B2
An antenna apparatus for a portable terminal is provided. The portable terminal includes a printed circuit board (PCB) having a ground surface and RF components to process a wireless signal received through at least one antenna element. A housing forms an external appearance of the portable terminal, and has a non-conductive member with a plurality of metal fragments attached thereto. At least one of the metal fragments is electrically connected to the ground surface. The metal fragments may enhance the texture and durability of the housing. Preferably, the shapes, sizes and distances separating the metal fragments are designed to minimally impact, or improve, the antenna performance provided by the at least one antenna element.
US09343798B2
This invention discloses a design and fabrication of a high performance compact antenna to receive public airwaves HDTV signals. The subject antenna consists of a high efficient cone shape broadband element excited over a small metal ground plane. A reflecting surface is implemented to help rejecting any unwanted multiple reflecting signals from the surrounding objects. Outstanding impedance characteristics and broad pattern coverage have been obtained. The pattern coverage is omnidirectional. The polarization is linear along the cone axis. This antenna design operates well in a weak signal environment and as a result the antenna can receive a large number of public channels. Although the antenna measures only 5¾×5¾×3¼ inches in a cubical enclosure or in a 6⅜ inches diameter by 3½ inches depth cylindrical body, the antenna packaged in either enclosure can receive more public channels than a much larger antenna twice of its size. Two invention antennas have been fabricated and tested and the test results confirmed that all antennas of either enclosure were performing well as expected. The invention antennas receive more than 130 public channels.
US09343794B2
A millimeter wave bands semiconductor package includes a metal base body, a circuit board, and a metal cover body. The base body has a first non-penetration hole and a second non-penetration hole. The circuit board is disposed on the base body and has an input signal line and an output signal line on a front side surface thereof. The cover body is disposed on the circuit board and has a first penetration hole and a second penetration hole. The cover body is disposed such that the first penetration hole is disposed directly above the first non-penetration hole of the base body and the second penetration hole is disposed directly above the second non-penetration hole of the base body. Further, the first penetration hole and the first non-penetration hole constitute a first waveguide, and the second penetration hole and the second non-penetration hole constitute a second waveguide.
US09343784B2
A battery pack thermal management assembly draws heat from prismatic batteries having opposed major surfaces and arranged in a stacked configuration inside a housing. The thermal management assembly includes a plurality of thermal transfer sheets made from sheets of a compressed mass of exfoliated graphite particles. Each thermal transfer sheet is positioned to contact the major surface of at least one of the prismatic batteries. A cover plate has a top face and a bottom face and includes a plurality of apertures through which the plurality of thermal transfer sheets extend. The apertures include at least one curved sidewall and the thermal transfer sheets are bent over the curved sidewall. At least a portion of each of the thermal transfer sheets is secured between a heat sink and the top face.
US09343781B2
An Adaptive Current-collector Electrochemical (ACE) system utilizes an array of contact pads and associated current control transistors to control localized current generation in discrete regions of a battery. Each contact pad is formed on a battery electrode (anode or cathode) and coupled to an associated discrete battery region, and is connected by an associated transistor to a current collection plate. Sensors are used to monitor operating parameters (e.g., localized current flow and operating temperature) of each discrete battery region, and a control circuit uses the sensor data to control the operating state of the transistors, whereby localized current flow through each transistor is increased, decreased or turned off according to measured local operating parameters. The control circuit utilizes local control circuits that process local sensor data using “stand-alone” control logic, or a central controller that processes all sensor data and coordinates transistor operations.
US09343779B2
Provided are a method of preparing an electrode assembly, in which both sides of a single current collector are coated to form an anode and a cathode, and the current collector is then bent into a vertical sectional zigzag shape and integrated in a state of disposing a separator at interfaces between facing electrode patterns, an electrode assembly prepared by the above method, and a secondary battery comprising the electrode assembly.
US09343770B2
A microbial fuel cell is provided that includes a cell housing, a membrane dividing an internal chamber of the cell housing into an anode compartment and a cathode compartment, an anode including a graphite and first microorganisms contained in the anode compartment, a cathode including graphite and a second microorganisms contained in the cathode compartment, and a watercourse communicating the anode compartment and the cathode compartment with one another. A system including at least one microbial fuel cell and methods of operating the microbial fuel cell and system are also provided.
US09343768B2
In a solid polymer electrolyte fuel cell, a potential is swept to obtain a cyclic voltammogram. The activation treatment is completed when any of conditions (a) to (c) is satisfied. (a): the peak number between 0.1 and 0.3 V increases from one to two, and inequalities of I1/I3≧1.2 and I2/I3≧1.2 are satisfied where I1, I2 and I3 are current values of the two peaks, and the minimum current value between the two peaks, respectively; (b): an oxidation peak within a range of 0.4 to 0.7 V decreases, and a charge amount corresponding to the peak decreases to 20 mC or less; and (c): the ratio I5/I4 increases from less than 1 to 1 where I4 and I5 are current values of a reduction peak within a range of 0.6 to 0.7 V and a reduction peak within a range of 0.7 to 0.8 V, respectively.
US09343764B2
In various aspects, systems and methods are provided for integration of molten carbonate fuel cells with a methanol synthesis process. The molten carbonate fuel cells can be integrated with a methanol synthesis process in various manners, including providing synthesis gas for use in producing methanol. Additionally, integration of molten carbonate fuel cells with a methanol synthesis process can facilitate further processing of vent streams or secondary product streams generated during methanol synthesis.
US09343760B2
A system and method for reconditioning a fuel cell stack to recover stack voltage loss. The method includes first operating the fuel cell stack in a wet condition where the humidity level in the stack is above 100% to provide liquid water at the cell electrodes. The method then applies a low voltage potential to the stack that causes contaminants to be released from the catalyst surface of the cell electrodes. This step can include starving the cathode side of oxygen for a limited period of time. The method then causes water to flow through the stack so that the contaminants are flushed out of the stack. The process can be performed during vehicle operation where small amounts of voltage would be recovered or during vehicle service where a relatively large amount of voltage could be recovered.
US09343757B2
Among other things, a gas storage system includes a group of capsules and an activation element coupled to the group. The group of capsules are formed within a substrate and contain gas stored at a relatively high pressure compared to atmospheric pressure. The activation element is configured to deliver energy in an amount sufficient to cause at least one of the capsules to release stored gas.
US09343755B2
A method and system for cooling a pressurized charge air in the fuel cell system of a vehicle, using first and second charge air coolers. The system further includes a gas-to-gas humidifier and a fuel cell stack. According to the method and system, cathode exhaust gas passes through the gas-to-gas humidifier and is also used as the coolant gas in the first charge-air cooler. Therefore, the fuel cell cathode exhaust is heated and reduced in water content, reducing the tendency of water in the exhaust to condense and pool underneath the vehicle. Also provided is a three-fluid heat exchanger which integrates the first and second charge air coolers.
US09343752B2
A fuel cell stack includes a stacked body which includes separators and a membrane electrode assembly. A first terminal plate, a first insulator, and a first end plate are disposed at a first end of the stacked body. A second terminal plate, a second insulator, and a second end plate are disposed at a second end of the stacked body. Each of the first terminal plate and the second terminal plate is provided in a first recessed portion formed in each of the first insulator and the second insulator. Each of the first and second insulators includes an outer peripheral part and a protrusion and recess portion in the outer peripheral part which is in contact with each of the separators that is disposed at the first and second ends. The protrusion and recess portion has a shape corresponding to a protrusion and recess shape of the separator.
US09343748B2
A class of materials has advantageous utility in electrocatalytic applications, e.g., fuel cells. The materials circumvent conventional Pt-based anode poisoning and the agglomeration/dissolution of supported catalysts during long-term operation by exploiting the unique physical and chemical properties of bulk metallic glass to create nanowires for electrocatalytic applications, e.g., fuel cell and battery applications. These amorphous metals can achieve unusual geometries and shapes along multiple length scales. The absence of crystallites, grain boundaries and dislocations in the amorphous structure of bulk metallic glasses results in a homogeneous and isotropic material down to the atomic scale, which displays very high strength, hardness, elastic strain limit and corrosion resistance. The melting temperatures of the disclosed bulk metallic glasses are much lower than the estimated melting temperatures based on interpolation of the alloy constituents making them attractive as highly malleable materials.
US09343742B2
A nickel hydride secondary battery houses an electrode group including a positive electrode and a negative electrode which are overlapped with each other via a separator with an alkaline electrolyte solution, the negative electrode includes a hydrogen absorbing alloy, a negative-electrode additive agent, a thickening agent, and a conductive material, and the negative-electrode additive agent includes at least one selected from calcium fluoride, calcium sulfide, and calcium chloride.
US09343741B2
An electrode material of the invention includes an agglomerate formed by agglomerating carbonaceous coated electrode active material particles obtained by forming a carbonaceous coat on surfaces of electrode active material particles at a coating rate of 80% or more, and the carbonaceous coated electrode active material particles include first carbonaceous coated electrode active material particles on which a carbonaceous coat having a film thickness in a range of 0.1 nm to 3.0 nm and an average film thickness in a range of 1.0 nm to 2.0 nm is formed and second carbonaceous coated electrode active material particles on which a carbonaceous coat having a film thickness in a range of 1.0 nm to 10.0 nm and an average film thickness in a range of more than 2.0 nm to 7.0 nm is formed.
US09343740B2
There is provided a lithium ion battery which maintains the flame retardancy of an electrolyte over a long period of time, has high energy density, and has improved charge/discharge cycle characteristics, high temperature storage characteristics, and rate characteristics. The lithium ion battery according to the present exemplary embodiment is a lithium ion battery comprising an electrolyte containing at least an ionic liquid and a lithium salt, a positive electrode, and a negative electrode, wherein the negative electrode includes a negative electrode active material which is a carbon material treated with a surface treatment agent.
US09343739B2
In one aspect, a positive active material is provided that may have increased thermal stability and resistance to capability deterioration due to repeated charging and discharging, a method of manufacturing the same, and a lithium battery that includes the positive active material.
US09343734B2
The present invention provides a multi-dimensional carbon active compound composite comprising a first carbon material, a second carbon material, an active compound, and further a seed material. This composite is capable of storing faradic or non-faradic charges. The produced multi-dimensional carbon can significantly inhibit the aggregation and disintegration of active compounds. Stacked carbon structure also formed a 3-D framework with high electron conductivity, which increases the rate capability of electrode. The green and simple synthesis process has a great potential for mass production. This green energy storage material can be widely applied to lithium secondary ion battery, supercapacitor, and lithium-air battery electrodes.
US09343724B2
To provide a cell connector for the electrically conductive connection of a first cell terminal of a first electrochemical cell and a second cell terminal of a second electrochemical cell of an electrochemical device, which allows a reliable and fail-safe connection of the cell terminals, it is proposed that the cell connector comprises a first contact section for connection to the first cell terminal, a second contact section for connection to the second cell terminal and an elastically and/or plastically deformable compensation region, which connects the first contact section and the second contact section to one another and allows a movement of these contact sections relative to one another.
US09343721B2
Provided is a separator for non-aqueous batteries, capable of being usefully used in non-aqueous batteries, and a non-aqueous battery equipped with this separator. The separator for non-aqueous batteries includes: a base layer comprising a fiber aggregate, and an electrolyte-swellable resin layer formed on at least one surface of the base layer, the resin layer comprising a urethane resin (C) obtained by reacting a polyol (A) including a vinyl polymer (a1) and a polyether polyol (a2) with a polyisocyanate (B). The vinyl polymer (a1) has as a main chain a vinyl polymer (a1′) having two hydroxyl groups at one of the termini of the main chain, and a polyoxyethylene chain having a number average molecular weight of 200 to 800 as a side chain, the percentage of the polyoxyethylene chain based on the vinyl polymer (a1) being within the range of 70 mass % to 98 mass %.
US09343709B2
To provide a highly reliable light-emitting device and especially a light-emitting device which can be formed without use of a metal mask and includes a plurality of light-emitting elements. A structural body at least an end of which has an acute-angled shape is provided so that the end can pass downward through an electrically conductive film formed over the insulating layer and can be at least in contact with an insulating layer having elasticity, thereby physically separating the electrically conductive film, and the electrically conductive films are thus electrically insulated from each other. Such a structure may be provided between adjacent light-emitting elements so that the light-emitting elements can be electrically insulated from each other in the light-emitting device.
US09343699B2
An organic light-emitting display apparatus including a substrate; a display unit which defines an active area of the substrate and includes a thin film transistor; concave-convex portions protruded from the substrate in an area outside the active area; and an encapsulation layer which encapsulates the display unit. The thin film transistor includes an active layer, a gate insulating layer on the active layer, a gate electrode, a source electrode, a drain electrode, and an interlayer insulating layer between the gate electrode and the source electrode, and between the gate electrode and the drain electrode. The concave-convex portions include portions of the gate insulating layer and the interlayer insulating layer, and the encapsulation layer covers the concave-convex portions.
US09343696B2
An adhesive film, a method for preparing an adhesive film, and an organic electronic device are provided. According to the adhesive film in exemplary embodiments of the present invention, fluidity of an adhesive can be controlled in the case of applying the adhesive between objects to be subsequently adhered to each other and then thermal-compressing by including an adhesive layer with cured side faces contacting with the outside. The adhesive film is used, for example for assembling a panel and the like, and thereby a defect rate at the time of assembling a panel and the like can be reduced and excellent work characteristics can be provided. In addition, before being applied to a panel or the like, a moisture absorbent included inside an adhesive layer of an adhesive film can be protected from external moisture or the like, thereby being easily stored, and also when it is applied to a product, reliability of life span, and the like can be secured.
US09343693B2
An organic light emitting diode includes a hole injection layer, a hole transport layer, an optical compensation layer, an emission layer, an electron transport layer and an electron injection layer. The optical compensation layer is disposed on the hole transport layer and includes a phosphorescent host material. Thus, an electron barrier on an interface between the optical compensation layer and an emission layer may be reduced. Thus, the luminance efficiency in a low gray scale area may be decreased, and the stain and roll-off phenomenon in the low gray scale area may be improved.
US09343680B2
This invention generally relates to a patterned substrate for an electronic device and to electronic devices, device arrays, field effect transistors and transistor arrays comprising the patterned substrate. The invention also relates to a logic circuit, display, memory or sensor device comprising the patterned substrate. Further the invention relates to a method of patterning a substrate for an electronic device. In an embodiment, a patterned substrate for an electronic device comprises: a first body having an edge; a second body comprising an elongate plurality of printed droplets having an edge adjacent to and substantially aligned to said first body edge; and a separation between said first body edge and said second body edge, wherein said elongate plurality of printed droplets is at an angle of about 5 degrees to about 90 degrees to said first body edge.
US09343673B2
Embodiments of the invention generally relate to memory devices and methods for fabricating such memory devices. In one embodiment, a method for fabricating a resistive switching memory device includes depositing a metallic layer on a lower electrode disposed on a substrate and exposing the metallic layer to an activated oxygen source while heating the substrate to an oxidizing temperature within a range from about 300° C. to about 600° C. and forming a metal oxide layer from an upper portion of the metallic layer during an oxidation process. The lower electrode contains a silicon material and the metallic layer contains hafnium or zirconium. Subsequent to the oxidation process, the method further includes heating the substrate to an annealing temperature within a range from greater than 600° C. to about 850° C. while forming a metal silicide layer from a lower portion of the metallic layer during a silicidation process.
US09343667B1
A memory device can include at least one programmable impedance cell having at least one programmable layer formed between a first terminal and a second terminal, the programmable layer being programmable between at least two impedance states by application of electric fields; and at least a first access bipolar junction transistor (BJT) coupled to the programmable impedance cell having at least a portion formed by a semiconductor material; wherein a base region and a first emitter region or collector region of the first access BJT are vertically aligned with one another.
US09343658B2
A basic Spin-Orbit-Torque (SOT) structure with lateral structural asymmetry is provided that produces a new spin-orbit torque, resulting in zero-field current-induced switching of perpendicular magnetization. More complex structures can also be produced incorporating the basic structure of a ferromagnetic layer with a heavy non-magnetic metal layer having strong spin-orbit coupling on one side, and an insulator layer on the other side with a structural mirror asymmetry along the in-plane direction. The lateral structural asymmetry and new spin-orbit torque, in effect, replaces the role of the external in-plane magnetic field. The direction of switching is determined by the combination of the direction of applied current and the direction of symmetry breaking in the device.
US09343656B2
Methods and apparatuses for a magnetic tunnel junction (MTJ) which can be used in as a magnetic random access memory cell are disclosed. The MTJ comprises a free layer and an insulator layer. The MTJ further comprises a pinned layer with a first region, a second region, and a third region. The second region is of a first length and of a first thickness, and the first region and the third region are of a second length and of a second thickness. A ratio of the first thickness to the second thickness may be larger than 1.2. A ratio of the second length to the first length is larger than 0.5. The first thickness may be larger than a spin diffusion length of a material for the pinned layer. So formed MTJ results in increased tunneling magnetic resistance ratio and reduced critical switch current of the MTJ.
US09343652B2
A method for producing a piezoelectric multilayer component is disclosed. Piezoelectric green films and electrode material are provided, arranged alternately on top of one another and sintered. The electrode material is provided with a PbO-containing coating and/or PbO is mixed into the electrode material.
US09343650B2
Piezoelectric material, piezoelectric element, multilayered piezoelectric element, liquid ejection head, liquid ejection apparatus, ultrasonic motor, optical equipment, vibration apparatus, dust removing apparatus, imaging apparatus, and electronic equipment
Provided is a lead-free piezoelectric material having a satisfactory and stable piezoelectric constant and electric insulation property in a wide practical temperature range. Provided is a piezoelectric material, including a perovskite-type metal oxide represented by the following general formula (1) as a main component, the piezoelectric material containing Mn in a content of 0.01 part by weight or more and 0.80 part by weight or less with respect to 100 parts by weight of the perovskite-type metal oxide: (LiαxNaαyKαzBaβBi0.5α+γ)a(Tiα+βFeγ) O3 . . . (1), where 0.800≦α≦0.999, 0≦β≦0.150, 0.001≦γ≦0.050, α+β+γ=1, 0≦x≦0.050, 0.045≦y≦0.450, 0.045≦z≦0.450, 0.450≦x+y+z≦0.500, and 0.980≦a≦1.020.
US09343648B2
The invention relates to a method of manufacturing a thermoelectric device comprising a plurality of thermoelectric components (4) for creating an electric current from a temperature gradient applied between two faces (3a, 3b) thereof. In the method, a thermally conductive support (30) is provided in contact with a hot or cold source, a thermally conductive and electrically insulating material is thermally sprayed on the support (30) to produce a coating (21), and an electrically conductive material is thermally sprayed onto the coating (21) to form electric conduction tracks (22) which are intended to receive the thermoelectric components (4) via the faces (3a, 3b) thereof. The invention also relates to a thermoelectric device obtained by the method.
US09343646B2
A power generating bearing assembly (100) comprises a bearing subassembly (120) retained by a bearing housing (110). During operation, friction and other factors increase a temperature of the bearing assembly (100). The housing (110) can optionally include a bearing cooling passage system comprising at least one liquid cooling passage (134) formed internally therein. The liquid cooling passage (134) would be routed proximate the bearing subassembly (120) to remove heat therefrom. A thermal energy transfer media (204) is inserted into a thermal transfer conduit (180), wherein the thermal transfer conduit (180) passes across a heated section of the housing (110). The transfer media (204) conveys the thermal energy to a Thermo-Electric Generator (TEG) (200) located in a thermoelectric generator housing (250) attached to the bearing housing (110). The Thermo-Electric Generator (TEG) (200) utilizes a temperature difference between the transfer media (204) and the ambient air to generated electric power. The power can be used to operate electrically powered devices, such as condition sensors (150), communication devices, and the like.
US09343622B2
Provided is a nitride semiconductor light emitting device including: a substrate; a first buffer layer formed above the substrate; an indium-containing second buffer layer formed above the first buffer layer; an indium-containing third buffer layer formed above the second buffer layer; a first nitride semiconductor layer formed above the third buffer layer; an active layer formed above the first nitride semiconductor layer; and a second nitride semiconductor layer formed above the active layer. According to the present invention, the crystal defects are further suppressed, so that the crystallinity of the active layer is enhanced, and the optical power and the operation reliability are enhanced.
US09343618B2
A method of manufacturing a light-emitting device includes providing a case including an annular sidewall and an LED chip including a chip substrate and a crystal layer and mounted in a region surrounded by the sidewall of the case, and dripping a droplet of an electrically-charged phosphor-containing resin so as to fill a space between the sidewall and the LED chip. The droplet is attracted toward the sidewall by an electrostatic force during the dripping.
US09343608B2
A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.
US09343607B2
A novel photo-sensitive element for electronic imaging purposes and, in this context, is particularly suited for time-of-flight 3D imaging sensor pixels. The element enables charge-domain photo-detection and processing based on a single gate architecture. Certain regions for n and p-doping implants of the gates are defined. This kind of single gate architecture enables low noise photon detection and high-speed charge transport methods at the same time. A strong benefit compared to known pixel structures is that no special processing steps are required such as overlapping gate structures or very high-ohmic poly-silicon deposition. In this sense, the element relaxes the processing methods so that this device may be integrated by the use of standard CMOS technology for example. Regarding time-of-flight pixel technology, a major challenge is the generation of lateral electric fields. The element allows the generation of fringing fields and large lateral electric fields.
US09343606B2
Photovoltaic modules comprise solar cells having doped domains of opposite polarities along the rear side of the cells. The doped domains can be located within openings through a dielectric passivation layer. In some embodiments, the solar cells are formed from thin silicon foils. Doped domains can be formed by printing inks along the rear surface of the semiconducting sheets. The dopant inks can comprise nanoparticles having the desired dopant.
US09343605B2
A photovoltaic unit can minimally reduce a displacement of focus positions from solar cells and prevent a decrease in power generation efficiency even if elastic behaviors of a Fresnel lens sheet and a base plate on which solar cells are arranged due to changes in temperature and humidity are different. The photovoltaic unit includes an integrated multiple Fresnel lens sheet and a base plate on which solar cells are arranged adjacent to the focus positions of individual Fresnel lenses. The multiple Fresnel lens sheet is fixed to the base plate by a lens sheet fixing element at a lens sheet fixing portion adjacent to the center of gravity of the sheet.
US09343598B2
A solar cell includes a back electrode, a silicon substrate, a doped silicon layer and an upper electrode arranged in that order. The silicon substrate comprises a number of three-dimensional nano-structures aligned side by side adjacent to the upper electrode. The doped silicon layer is located on a surface of the three-dimensional nano-structures. A cross section of each three-dimensional nano-structure is M-shaped.
US09343594B2
A conductive composition includes at least: a) metal conductive fibers having an average minor axis length of from 1 nm to 150 nm; and b) a compound represented by the following Formula (1) or Formula (2) in an amount of from 0.1% by mass to 1000% by mass with respect to the metal conductive fibers: P—(CR1═Y)n-Q Formula (1) wherein, in Formula (1), P and Q each independently represent a group represented by OH, NR2R3 or CHR4R5, in which R2 and R3 each independently represent a hydrogen atom or a group that can be substituted on a nitrogen atom, and R4 and R5 each independently represent a hydrogen atom or a substituent; Y represents CR6 or a nitrogen atom; R1 and R6 each independently represent a hydrogen atom or a substituent; at least two of the groups represented by R1, R2, R3, R4, R5 or R6 may be bonded to each other to form a ring; n represents an integer from 0 to 5; when n is 0, neither P nor Q is a group represented by OH or CHR4R5; and when n represents a number of 2 or greater, the plurality of atomic groups each represented by (CR1═Y) may be the same as or different from each other; R7—C(═O)—H Formula (2) wherein, in Formula (2), R7 represents a hydrogen atom, an OH group, an alkyl group, an alkenyl group, an alkynyl group, an aryl group or a heterocyclic group.
US09343589B2
At least one isolation trench formed in a layer stack including substrate, channel, and upper gate layers define a channel in the channel layer. Lateral etching from the isolation trench(es) can form lateral cavities in the substrate and upper gate layer to substantially simultaneously form self-aligned lower and upper gates. The lower gate undercuts the channel, the upper gate is narrower than the channel, and a source and a drain can be formed on opposed ends of the channel. As a result, source-drain capacitance and gate-drain capacitance can be reduced, increasing speed of the resulting FET.
US09343588B2
A normally-off JFET is provided. The normally-off JFET includes a channel region of a first conductivity type, a floating semiconductor region of a second conductivity type adjoining the channel region, and a contact region of the first conductivity type adjoining the floating semiconductor region. The floating semiconductor region is arranged between the contact region and the channel region. Further, a normally-off semiconductor switch is provided.
US09343581B2
To provide a transistor with stable electrical characteristics, a transistor with a low off-state current, a transistor with a high on-state current, a semiconductor device including the transistor, or a durable semiconductor device. The semiconductor device includes a first transistor using silicon, an aluminum oxide film over the first transistor, and a second transistor using an oxide semiconductor over the aluminum oxide film. The oxide semiconductor has a lower hydrogen concentration than silicon.
US09343579B2
To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer filling a groove is surrounded by insulating layers including an aluminum oxide film containing excess oxygen. Excess oxygen contained in the aluminum oxide film is supplied to the oxide semiconductor layer, in which a channel is formed, by heat treatment in a manufacturing process of the semiconductor device. Moreover, the aluminum oxide film forms a barrier against oxygen and hydrogen, which inhibits the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layers including an aluminum oxide film and the entry of impurities such as hydrogen in the oxide semiconductor layer. Thus, a highly purified intrinsic oxide semiconductor layer can be obtained. The threshold voltage is controlled effectively by gate electrode layers formed over and under the oxide semiconductor layer.
US09343578B2
A semiconductor device includes an oxide semiconductor layer over a first oxide layer; first source and drain electrodes over the oxide semiconductor layer; second source and drain electrodes over the first source and drain electrodes respectively; a second oxide layer over the first source and drain electrodes; a gate insulating layer over the second source and drain electrodes and the second oxide layer; and a gate electrode overlapping the oxide semiconductor layer with the gate insulating layer provided therebetween. The structure in which the oxide semiconductor layer is sandwiched by the oxide layers can suppress the entry of impurities into the oxide semiconductor layer. The structure in which the oxide semiconductor layer is contacting with the source and drain electrodes can prevent increasing resistance between the source and the drain comparing one in which an oxide semiconductor layer is electrically connected to source and drain electrodes through an oxide layer.
US09343572B1
A high-voltage semiconductor device is provided. The high-voltage semiconductor device includes a substrate; an epitaxial layer and a gate structure; a first conductive type first high-voltage well region and a second conductive type high-voltage well region disposed in the epitaxial layer at opposite sides of the gate structure respectively, wherein the first conductive type is different from the second conductive type; a source region and a drain region; and a stack structure disposed between the gate structure and the drain region, wherein the stack structure includes: a blocking layer; an insulating layer disposed over the blocking layer; and a conductive layer disposed over the insulating layer and electrically connected the source region or the gate structure. A method for manufacturing the high-voltage semiconductor device is also provided.
US09343571B2
LDD regions are provided with high implant energy in devices with reduced thickness poly-silicon layers and source/drain junctions. Embodiments include forming an oxide layer on a substrate surface, forming a poly-silicon layer over the oxide layer, forming first and second trenches through the oxide and poly-silicon layers and below the substrate surface, defining a gate region therebetween, implanting a dopant in a LDD region through the first and second trenches, forming spacers on opposite side surfaces of the gate region and extending into the first and second trenches, and implanting a dopant in a source/drain region below each of the first and second trenches.
US09343559B2
Techniques are disclosed for customization of nanowire transistor devices to provide a diverse range of channel configurations and/or material systems within the same integrated circuit die. In accordance with one example embodiment, sacrificial fins are removed and replaced with custom material stacks of arbitrary composition and strain suitable for a given application. In one such case, each of a first set of the sacrificial fins is recessed or otherwise removed and replaced with a p-type layer stack, and each of a second set of the sacrificial fins is recessed or otherwise removed and replaced with an n-type layer stack. The p-type layer stack can be completely independent of the process for the n-type layer stack, and vice-versa. Numerous other circuit configurations and device variations are enabled using the techniques provided herein.
US09343551B2
Semiconductor devices and methods of manufacturing the same are disclosed. In some embodiments, a method of manufacturing a semiconductor device comprises forming a fin structure over a substrate. The fin structure may comprise a lower portion protruding from a major surface of the substrate, an upper portion, and a middle portion between the lower portion and the upper portion, wherein the lower portion and the middle portion differ in composition. The method may further include forming an isolation structure surrounding the fin structure and oxidizing the fin structure. The oxidizing may form a pair of notches extending from sidewalls of the fin structure into the middle portion of the fin structure.
US09343548B1
A manufacturing method of a thin film transistor of a display device, the method including forming a gate insulating layer on a semiconductor layer; attaching a halftone mask onto the gate insulating layer; forming a channel region including a plurality of bridged grain lines formed; exposing the gate insulating layer of the channel region; forming a gate electrode layer on the halftone mask and the gate insulating layer; forming a gate electrode on the channel region by etching a portion corresponding to a boundary of the channel region of the gate electrode layer; removing the halftone mask; forming source/drain regions; forming an interlayer insulating layer on the gate electrode and the gate insulating layer; forming contact holes by etching the gate insulating layer and the interlayer insulating layer to expose the source/drain regions; and forming source/drain electrodes connected with the source/drain regions through the contact holes.
US09343541B2
A method of fabricating a multi-layer structure for a power transistor device includes performing, within a reaction chamber, a nitrogen plasma strike, resulting in the formation of a nitride layer directly on a nitride-based active semiconductor layer. A top surface of the nitride layer is then exposed to a second source. A subsequent nitrogen-oxygen plasma strike results in the formation of an oxy-nitride layer directly on the nitride layer. The nitride layer comprises a passivation layer and the oxy-nitride layer comprises a gate dielectric of the power transistor device.
US09343536B2
A semiconductor device according to an embodiment includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer and having a wider band gap than the first semiconductor layer, a source electrode and a drain electrode provided on the second semiconductor layer, wherein at least one of the source electrode and the drain electrode includes a plurality of protrusions on a side in contact with the second semiconductor layer, and a gate electrode provided between the source electrode and the drain electrode.
US09343530B2
The present invention provides a method of manufacturing a fin structure of a FinFET, comprising: providing a substrate (200); forming a first dielectric layer (210); forming a second dielectric layer (220), the material of the portion where the second dielectric layer is adjacent to the first dielectric layer being different from that of the first dielectric layer (210); forming an opening (230) through the second dielectric layer (220) and the first dielectric layer (2100, the opening portion exposing the substrate; filling a semiconductor material in the opening (230); and removing the second dielectric layer (220) to form a fin structure. In the present invention, the height of the fin structure in the FinFET is controlled by the thickness of the dielectric layer. The etching stop can be controlled well by using the etching selectivity between different materials, which can achieve etching uniformity better compared to time control.
US09343524B2
Capacitor structures for integrated circuit devices are provided. Capacitors include proximate dense or highly dense etchstop layers. The dense or highly dense etchstop layer is, for example, a high-k material. Capacitors are, for example, metal-insulator-metal (MIM) capacitors and are useful in DRAM (dynamic random access memory) and eDRAM (embedded dynamic random access memory) structures.
US09343523B2
MIMCAP diodes are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP diodes can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes. The MIMCAP diode can include a barrier height modification layer, a low leakage dielectric layer and a high leakage dielectric layer. The layers can be sandwiched between two electrodes.
US09343522B2
A ceramic powder for use in a grain boundary insulated semiconductor ceramic that has an excellent ESD withstanding voltage, a semiconductor ceramic capacitor using the ceramic powder, and a manufacturing method therefor. The ceramic powder for use in a SrTiO3 based grain boundary insulated semiconductor ceramic has a specific surface area of 4.0 m2/g or more and 8.0 m2/g or less, and a cumulative 90% grain size D90 of 1.2 μm or less.
US09343514B2
An organic light-emitting diode (OLED) display according to an exemplary embodiment of the present invention includes a substrate, a thin film transistor formed on the substrate, a pixel electrode formed on the thin film transistor and electrically connected to the thin film transistor, a pixel definition layer formed on the pixel electrode so as to define a pixel region, an emission layer formed on the pixel electrode and contacting the pixel electrode in the pixel region, and an interlayer formed on the pixel definition layer and contacting part of the emission layer. One side of the interlayer has an uneven shape so that a surface area of the interlayer is increased.
US09343509B2
Provided is an organic light-emitting device including a plurality of pixels, each including a first sub-pixel, a second sub-pixel, and a third sub-pixel having different colors from each other. Each of the pixels includes a substrate, a first electrode layer on the substrate, a first light-emitting layer disposed on the first electrode in the first, second and third sub-pixels, an auxiliary layer disposed on the first light-emitting layer in the second and third sub-pixels, a second light-emitting layer disposed on the auxiliary layer in the second sub-pixel, a third light-emitting layer disposed on the auxiliary layer in the third sub-pixel, and a second electrode layer on the first, second, and third light-emitting layers.
US09343508B2
A wafer for forming an imaging element has a test pattern and a plurality of imaging element units. The wafer has an imaging region which includes a great number of photoelectric conversion pixels, an imaging element units and a test pattern. The test pattern includes a testing organic photoelectric conversion film and a testing counter electrode having the same configuration and formed at the same time as the organic photoelectric conversion film and a counter electrode, respectively of the photoelectric conversion pixels. A first testing terminal is electrically connected to the undersurface side of the testing organic photoelectric conversion film, and a second testing terminal is electrically connected to the testing counter electrode. A protective film is formed over the entire semiconductor wafer so as to cover the imaging region and the test pattern, and is then partially removed so that a part of each testing terminal is exposed.
US09343506B2
Some embodiments include a memory array having a first series of access/sense lines which extend along a first direction, a second series of access/sense lines over the first series of access/sense lines and which extend along a second direction substantially orthogonal to the first direction, and memory cells vertically between the first and second series of access/sense lines. Each memory cell is uniquely addressed by a combination of an access/sense line from the first series and an access/sense line from the second series. The memory cells have programmable material. At least some of the programmable material within each memory cell is a polygonal structure having a sidewall that extends along a third direction which is different from the first and second directions. Some embodiments include methods of forming memory arrays.
US09343502B2
Disclosed are an organic photoelectronic device including a first light-transmitting electrode, an active layer positioned on one side of the first light-transmitting electrode, and a second light-transmitting electrode positioned on one side of the active layer, wherein the first light-transmitting electrode and the second light-transmitting electrode independently comprise at least one of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (SnO), aluminum tin oxide (ATO), aluminum zinc oxide (AZO), and fluorine-doped tin oxide (FTO). Also disclosed is an image sensor including the organic photoelectronic device.
US09343501B2
A photoelectric conversion apparatus includes a TFT 10 provided on one surface of a substrate 1, a second interlayer insulation film 7 provided so as to cover the TFT 10, a shading film 9 provided on the second interlayer insulation film 7 in an area overlapping the TFT 10 when seen from a thickness direction of films that are formed on the substrate 1, a lower electrode 8 provided on the second interlayer insulation film 7, and a semiconductor film 21 having a chalcopyrite structure provided on the lower electrode 8. A group 16 element is included in the shading film 9, the lower electrode 8 and the semiconductor film 21.
US09343497B2
An imager may include an imaging die that is stacked with an image processing die. The imaging die may generate output signals from received light. The image processing die may process the output signals. Through-silicon vias of the imaging die or solder balls may electrically couple the imaging die to the image processing die and convey the output signals to the image processing die. The imaging die may include a pixel array that generates pixel signals from the received light. The image processing die may generate control signals that control the imaging die and are conveyed to the imaging die over the through-silicon vias or solder balls.
US09343495B2
A solid-state imaging device includes a semiconductor layer, a reflector, and a plurality of element separating regions. In the semiconductor layer, a plurality of photoelectric conversion elements is arranged in a two-dimensional array. The reflector covers a surface of the semiconductor layer on a side opposite to a surface of the semiconductor layer on which alight is incident, and reflects the light. The element separating regions are formed in the semiconductor layer to physically and electrically separate the plurality of photoelectric conversion elements. Each of the element separating regions extend from the surface of the semiconductor layer on which the light is incident to the reflector and has a reflection surface for reflecting light.
US09343484B2
A thin film transistor substrate and a display apparatus including the same are provided. The thin film transistor substrate includes a plurality of pixels each including: a first transistor for receiving a data signal in response to a first gate control signal; a second transistor for outputting a driving current according to the data signal applied to a gate electrode of the second transistor; and a third transistor for initializing a gate node connected to the gate electrode of the second transistor in response to a second gate control signal, wherein first electrodes of the third transistors of at least some adjacent pixels of the plurality of pixels are connected to the gate node, and second electrodes thereof are connected to a shared transistor that applies an initialization voltage to the second electrodes.
US09343482B2
Example embodiments are directed to a switching device of an active display device and a method of driving the switching device, such that electrical reliability of the active display device is improved. The switching device of the active display device includes a plurality of thin film transistors (TFTs) that are connected in series. Except for a refresh time duration during which the plurality of TFTs of the switching device are simultaneously turned ON, a positive voltage is applied to at least one of the plurality of TFTs of the switching device so that a reliability of the switching device may be improved.
US09343466B1
Methods for fabricating memory cells, methods for fabricating integrated circuits having memory cells, and integrated circuits having memory cells are provided. In one example, a method for fabricating a memory cell includes depositing a first tunnel dielectric layer over a semiconductor substrate. The method includes depositing a floating gate material over the first tunnel dielectric layer. The method forms two control gate stacks over the floating gate material, defines a source line area between the two control gate stacks, and defines select gate areas adjacent the two control gate stacks. The method includes depositing a second tunnel dielectric layer over the select gate areas of the semiconductor substrate. Further, the method includes forming select gates over the second tunnel dielectric layer over the select gate areas of the semiconductor substrate. The second tunnel dielectric layer forms a gate dielectric layer for each select gate.
US09343461B2
A semiconductor device has first conductivity type regions extending in a first direction, and second conductivity type regions extending in the first direction. The first conductivity type regions and the second conductivity type regions are alternately arranged in a second direction perpendicular to the first direction. The semiconductor device includes a first impurity diffused regions formed in the first conductivity type regions, a first local wiring connected to the first conductivity type regions, and extending in the second direction, a first potential supply wiring formed above the first local wiring, and extending in the first direction, and a first contact hole for connecting the first local wiring to the first potential supply wiring.
US09343460B2
The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.
US09343458B2
Among other things, an electrostatic discharge (ESD) device is provided. The ESD device comprises a dielectric isolation structure that is formed between an emitter and a collector of the ESD device. During an ESD event, current flows from the emitter, substantially under the dielectric isolation structure, to the collector, to protect associated circuitry. The dielectric isolation structure is formed to a depth that is less than a depth of at least one of the emitter or the collector, or doped regions thereof, thereby decreasing a length of a current path from the emitter to the collector, because the current is not obstructed by the dielectric isolation structure. Accordingly, the ESD device can carry higher current during the ESD event because the shorter current path has less resistance than a longer path that would otherwise be traveled if the dielectric isolation structure was not formed at the shallower depth.
US09343445B2
A photoelectric conversion device includes a circuit board, a light emitting module, a light receiving module, and an optical coupling lens. Two protrusions apart from each other extend from the circuit board. The light emitting module and the light receiving module are mounted on the circuit board and apart from each other. The optical coupling lens includes an oblique reflection surface and a recess having a bottom surface parallel to the circuit board. Two distanced posts perpendicularly extend from the bottom surface and engage with the centers of the protrusions upon assembly to ensure automatic and alignment of the light emitting module with the first converging lens, and alignment of the light receiving module with the second converging lens.
US09343440B2
In one implementation, a stacked composite device comprises a group IV vertical transistor and a group III-V transistor stacked over the group IV vertical transistor. A drain of the group IV vertical transistor is in contact with a source of the group III-V transistor, a source of the group IV vertical transistor is coupled to a gate of the group III-V transistor to provide a composite source on a bottom side of the stacked composite device, and a drain of the group III-V transistor provides a composite drain on a top side of the stacked composite device. A gate of the group IV vertical transistor provides a composite gate on the top side of the stacked composite device.
US09343435B2
A method for manufacturing a semiconductor device may include providing a first dielectric layer and a first set of conductive pads on a first substrate. Each conductive pad of the first set of conductive pads may be positioned between portions of the first dielectric layer. The method may further include providing a first insulating material layer to cover the first dielectric layer and the first set of conductive pads. The method may further include removing portions of the first insulating material layer to form a first insulating layer. Openings of the first insulating layer may expose the first set of conductive pads.
US09343433B2
A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.
US09343421B2
A method for fabricating a semiconductor package is provided, which includes the steps of: providing a first substrate having a plurality of first conductive posts on a surface thereof and providing a second substrate having a third surface having a chip disposed thereon and a fourth surface opposite to the third surface; disposing the first substrate on the third surface of the second substrate through the first conductive posts; forming an encapsulant between the first substrate and the second substrate, wherein the encapsulant has a first surface adjacent to the first substrate and a second surface opposite to the first surface; and removing the first substrate, thereby effectively preventing solder bridging from occurring.
US09343412B2
A method of forming a MOSFET structure is provided. In the method, an epitaxial layer is formed. A cap layer is formed above the epitaxial layer. A first trench is formed above the epitaxial layer. A protection layer is deposited within the first trench. The protection layer is a material selected from the group consisting of germanium and silicon-germanium.
US09343411B2
Techniques and structure are disclosed for enhancing fracture resistance of back-end interconnects and other such interconnect structures by increasing via density. Increased via density can be provided, for example, within the filler/dummified portion(s) of adjacent circuit layers within a die. In some cases, an electrically isolated (floating) filler line of an upper circuit layer may include a via which lands on a floating filler line of a lower circuit layer in a region corresponding to where the filler lines cross/intersect. In some such cases, the floating filler line of the upper circuit layer may be formed as a dual-damascene structure including such a via. In some embodiments, a via similarly may be provided between a floating filler line of the upper circuit layer and a sufficiently electrically isolated interconnect line of the lower circuit layer. The techniques/structure can be used to provide mechanical integrity for the die.
US09343404B2
An anti-fuse based on a Field Nitride Trap (FNT) is disclosed. The anti-fuse includes a first active pillar including a first junction, a second active pillar including a second junction, a selection line buried between the first active pillar and the second active pillar, and a trap layer for electrically coupling the first junction to the second junction by trapping minority carriers according to individual voltages applied to the first junction, the second junction and the selection line. As a result, the fuse can be highly integrated through the above-mentioned structure, and programming of the fuse can be easily achieved.
US09343401B2
A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
US09343400B2
A method of forming a metallization layer in a semiconductor substrate includes forming a patterned dielectric layer on a substrate, the patterned dielectric layer having a plurality of first openings. A first conductive layer is formed in the plurality of first openings. A patterned mask layer is formed over portions of the first conductive layer outside the plurality of first openings, the patterned mask layer having a plurality of second openings, wherein at least a subset of the second openings are disposed over the first openings. A second conductive layer is filled in the plurality of second openings. The patterned mask layer is removed to leave behind the conductive layer structures on the substrate. The substrate is heated to form a self-forming barrier layer on the top and sidewalls of the conductive layer structures.
US09343389B2
Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with magnetic contacts, as well as corresponding fabrication methods and systems incorporating such magnetic contacts. A first IC substrate may have a first magnet coupled with a first electrical routing feature. A second IC substrate may have a second magnet coupled with a second electrical routing feature. The magnets may be embedded in the IC substrates and/or electrical routing features. The magnets may generate a magnetic field that extends across a gap between the first and second electrical routing features. Electrically conductive magnetic particles may be applied to one or both of the IC substrates to form a magnetic interconnect structure that extends across the gap. In some embodiments, magnetic contacts may be demagnetized by heating the magnets to a corresponding partial demagnetization temperature (PDT) or Curie temperature. Other embodiments may be described and/or claimed.
US09343382B2
An electronic device includes a substrate; an element configured to be formed on the substrate; a sidewall member configured to enclose the element on the substrate; a cover member configured to be disposed on the sidewall member, and to partition a space around the element along with the sidewall member on the substrate; and a seal member configured to be disposed outside of the sidewall member, to bond the sidewall member and the cover member to a surface of the substrate, and to seal the space.
US09343379B2
This invention generally relates to a process for detecting grown-in-defects in a semiconductor silicon substrate. The process includes contacting a surface of the semiconductor silicon substrate with a gaseous acid in a reducing atmosphere at a temperature and duration sufficient to grow grown-in -defects disposed in the semiconductor silicon substrate to a size capable of being detected by an optical detection device.
US09343376B1
A method of fabricating a semiconductor device includes following steps. First of all, a first nanowire structure and a second nanowire structure are formed on a substrate. Next, a compressive stress layer is formed on the first nanowire structure, and the first nanowire structure is driven to a compressive nanowire structure. Then, a tensile stress layer is formed on the second nanowire structure, and the second nanowire structure is driven into a tensile nanowire structure.
US09343373B2
A semiconductor device has a substrate; and an N-channel MIS transistor and a P-channel MIS transistor provided on the same substrate; each of the N-channel MIS transistor and the P-channel MIS transistor having a Hf-containing, high-k gate insulating film, and a gate electrode provided over the high-k gate insulating film, the N-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains a first work function adjusting element, provided between the substrate and the high-k gate insulating film, and, the P-channel MIS transistor having a silicon oxide film or a silicon oxynitride film, which contains the first work function adjusting element same as that contained in the N-channel MIS transistor, provided between the high-k gate insulating film and the gate electrode.
US09343366B2
Approaches for hybrid laser scribe and plasma etch dicing process for a wafer having backside solder bumps are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof and corresponding arrays of metal bumps on a backside thereof involves applying a dicing tape to the backside of the semiconductor wafer, the dicing tape covering the arrays of metal bumps. The method also involves, subsequently, forming a mask on the front side of the semiconductor wafer, the mask covering the integrated circuits. The method also involves forming scribe lines on the front side of the semiconductor wafer with a laser scribing process, the scribe lines formed in the mask and between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, the mask protecting the integrated circuits during the plasma etching.
US09343361B2
In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
US09343354B2
A contact structure includes a permanent antireflection coating formed on a substrate having contact pads. A patterned dielectric layer is formed on the antireflective coating. The patterned dielectric layer and the permanent antireflective coating form openings. The openings correspond with locations of the contact pads. Contact structures are formed in the openings to make electrical contact with the contacts pads such that the patterned dielectric layer and the permanent antireflective coating each have a conductively filled region forming the contact structures.
US09343352B2
An embodiment radio frequency area of an integrated circuit is disclosed. The radio frequency area includes a substrate having an implant region. The substrate has a first resistance. A buried oxide layer is disposed over the substrate and an interface layer is disposed between the substrate and the buried oxide layer. The interface layer has a second resistance lower than the first resistance. A silicon layer is disposed over the buried oxide layer and an interlevel dielectric is disposed in a deep trench. The deep trench extends through the silicon layer, the buried oxide layer, and the interface layer over the implant region. The deep trench may also extend through a polysilicon layer disposed over the silicon layer.
US09343343B2
A method for transporting a substrate using an end effector which mechanically clamps a periphery of the substrate includes: before transporting the substrate, depositing a compressive film only on, at, or in a bevel portion of the substrate; and transporting the substrate whose bevel portion is covered by the compressive film as the outermost film, using an end effector while mechanically clamping the periphery of the substrate.
US09343341B2
An end effector device attached to a tip end portion of a robot arm includes a plurality of support units provided on a blade. Each of the support units includes: a plurality of nail pieces configured to support peripheral portions of a plurality of semiconductor wafers such that the semiconductor wafers are parallel to one another and spaced apart from one another; and a pitch changing mechanism configured to change upper-lower intervals of the nail pieces. The pitch changing mechanism includes: a coil spring configured to support the plurality of nail pieces such that the plurality of nail pieces are spaced apart from one another in an upper-lower direction and elastically deform in the upper-lower direction; and an operating mechanism configured to cause the coil spring to elastically deform in the upper-lower direction. The operating mechanism includes a piston pin fitted in the coil spring to move up and down.
US09343340B2
A vacuum processing apparatus is disclosed for processing workpieces. The apparatus includes a load lock adapted to store the workpiece inside and to be switched between atmosphere and vacuum. Vacuum transport chambers are connected to the load lock and to the corresponding process chambers in a state where the load lock and each of the process chambers are isolated. The workpiece can be transferred between each of the process chambers and the load lock via the corresponding vacuum transport chamber. The apparatus also includes load lock valves for switching between interrupt and opening between the load lock and the corresponding vacuum transport chambers, and process chamber valves for switching between interrupt and opening between the process chambers and the corresponding vacuum transport chambers. Timing for opening and closing the valves is controlled in synchronization with the transfer of the workpieces.
US09343339B2
A coating head is constructed of a solvent feed mechanism connected to a forward side in a direction of movement of a coating solution feed mechanism, and a gas jet mechanism connected to a rearward side in the direction of movement. While moving the coating head relative to a substrate, a solvent is supplied onto the substrate from the solvent feed mechanism, then a coating solution is supplied onto a film of the solvent from the coating solution feed mechanism, and finally a gas is jetted to an uneven surface of the coating solution from the gas jet mechanism to smooth a thin film surface of the coating solution.
US09343338B2
When a die to be stripped out of plural dies (semiconductor chips) bonded to a dicing film is to be tossed and stripped from the dicing film, the dicing film corresponding to predetermined positions out of the peripheral portion of the die is tossed to form stripping start points. The dicing film corresponding to portions other than the above predetermined positions is then tossed to strip the die from the dicing film.
US09343335B1
Methods and systems for cleaning photoresist dispense nozzles of a wafer processing photoresist coater module are disclosed. A method comprises dispensing a photoresist cleaning solvent from an edge bead removal dispense of the coater module onto a central portion of a substrate disposed on a spin chuck to form a puddle, making contact between the photoresist dispense nozzles and the puddle and washing for a select amount of time, thereby removing photoresist from the photoresist dispense nozzles. A system comprises a process controller controlling positioning of the photoresist dispense nozzles over the substrate, positioning of the edge bead dispense over the central portion of the wafer, dispensing photoresist cleaning solvent on the central portion of the wafer, and positioning of the spin chuck such that the photoresist dispense nozzles contact the solvent for cleaning.
US09343334B2
An electronic component comprises: a resin frame; a semiconductor substrate housed in the resin frame; a plate shape metal member having at least one end fixed in the resin frame at a position spaced apart from the semiconductor substrate; an electrical connection region portion formed on the surface on the side of the plate shape metal member of the semiconductor substrate with an electrically conductive material; and a solder layer formed on the surface on the side of the plate shape metal member of the electrical connection region portion, wherein the plate shape metal member supports the semiconductor substrate without contact through the solder layer and the electrical connection region portion, and is electrically connected to the electrical connection region portion.
US09343325B2
Improved sidewall image transfer (SIT) techniques are provided. In one aspect, a SIT method includes the following steps. An oxide layer is formed on a substrate. A transfer layer is formed on a side of the oxide layer opposite the substrate. A mandrel layer is formed on a side of the transfer layer opposite the oxide layer. The mandrel layer is patterned to form at least one mandrel. Sidewall spacers are formed on opposite sides of the at least one mandrel. The at least one mandrel is removed, wherein the transfer layer covers and protects the substrate during removal of the at least one mandrel. The transfer layer is etched using the sidewall spacers as a hardmask to form a patterned transfer layer. The oxide layer and the sidewall spacers are removed from the substrate. The substrate is etched using the patterned transfer layer as a hardmask.
US09343314B2
A method of making a split gate non-volatile memory (NVM) includes forming a charge storage layer on the substrate, depositing a first conductive layer, and depositing a capping layer. These layers are patterned to form a control gate stack. A second conductive layer is deposited over the substrate and is patterned to leave a first portion of the second conductive layer over a portion of the control gate stack and adjacent to a first side of the control gate stack. The first portion of the second conductive layer and the control gate stack are planarized to leave a dummy select gate from the first portion of the second conductive layer, where a top surface of a remaining portion of the first conductive layer is lower relative to a top surface of the dummy select gate. The dummy select gate is replaced with a select gate including metal.
US09343306B2
A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a channel region disposed therebetween. The poly-silicon islands include several first poly-silicon islands and several second poly-silicon islands. The first poly-silicon islands having main grain boundaries and sub grain boundaries are only disposed within the display region and the gate driver region. The main grain boundaries of the first poly-silicon islands are only disposed within the source regions and/or the drain regions. The second poly-silicon islands are disposed in the source driver region. Grain sizes of the first poly-silicon islands are substantially different from those of the second poly-silicon islands. Gates corresponding to the channel regions are disposed on the substrate.
US09343297B1
A single-phase multi-element film constituted by at least four elements is formed on a substrate by plasma-enhanced atomic layer deposition (PEALD) conducting one or more process cycles. Each process cycle includes: (i) forming an integrated multi-element layer constituted by at least three elements on a substrate by PEALD using at least one precursor; and (ii) treating a surface of the integrated multi-element layer with a reactive oxygen, nitrogen, and/or carbon in the absence of a precursor for film formation so as to incorporate at least one new additional element selected from oxygen, nitrogen, and carbon into the integrated multi-element layer.
US09343288B2
To increase the degree of integration of a semiconductor device such as a DCDC converter. In a semiconductor device (e.g., DCDC converter) including a controller circuit and a switching transistor, the switching transistor formed using an oxide semiconductor layer is stacked over a substrate on which the controller circuit is formed. The switching transistor includes a backgate to release heat generated in the oxide semiconductor layer. The backgate has electrical conduction with a wiring to release heat and prevent a temperature increase with integration. Moreover, for power saving, a potential hold portion including a transistor and a capacitor may be formed using part of the oxide semiconductor layer over the controller circuit. The potential hold portion is formed in a circuit for generating a bias potential in the controller circuit.
US09343287B2
A substrate processing apparatus includes a plurality of chuck pins and a heat source. The chuck pin includes a conductive member made of a material containing carbon, and a pin cover that covers the conductive member. The conductive member includes a gripping portion softer than the substrate, the gripping portion to be pressed onto a peripheral edge portion of the substrate, and protrudes outward from an outer peripheral edge of the substrate in a plan view in a state where the gripping portion is pressed onto the peripheral edge portion of the substrate. The pin cover covers, in a plan view, the entire region of a part of the conductive member protruding outward from the outer peripheral edge of the substrate in a plan view in a state where the gripping portion is pressed onto the peripheral edge portion of the substrate.
US09343281B2
In a tandem mass spectrometry system, a first mass analyzer filters parent ions using a wide mass passband with a narrow rejection notch defined according to a modulation format. A wide mass range of parent ions is transmitted to an ion fragmentation device. Daughter ions produced thereby are transmitted to a second mass analyzer to produce a daughter ion mass spectrum. The modulation of the measured daughter ion mass spectrum, when correlated with the passband modulation of the first mass analyzer (i.e., parent ion spectrum), allows definitive identification of each daughter mass peak with the appropriate parent ion. Due to the wide mass passband, the ion detector signal is in proportion to the increased ion flux passed by the first mass analyzer.
US09343279B2
Systems and methods are disclosed for identifying detectable compounds of a sample. Sample product ion spectra are received for each mass selection window of precursor mass selection windows for each time step. The received sample product ion spectra are searched for the presence of known compounds of interest with known product ion spectra by retrieving a known product ion spectrum from a library, retrieving the sample product ion spectra corresponding to the precursor mass selection window expected to contain a precursor ion corresponding to the known product ion spectrum, generating product ion traces in time for the retrieved sample product ion spectra, calculating a score for the product ion traces and the retrieved sample product ion spectra that represents how well the retrieved sample product ion spectra and the known product ion spectrum match, and confirming the identity of a precursor ion using the score.
US09343273B2
A substrate holder for a substrate including a frame body having an opening for the placement of the substrate. The frame body also includes a hollow portion therein. The substrate holder may be used in a sputtering apparatus for sputtering material onto the substrate. The substrate holder is particularly advantageous in the manufacturing of magnetic recording medium.
US09343270B2
A plasma processing apparatus includes a processing chamber configured to partition a processing space and a microwave generator configured to generate microwaves for plasma excitation. Further, the plasma processing apparatus includes a dielectric member mounted in the processing chamber so as to seal the processing space, and configured to introduce the microwaves generated by the microwave generator into the processing space. Further, the plasma processing apparatus includes an injector mounted in the dielectric member, and configured to supply the processing gas made in a plasma state due to the microwaves to the processing space through a through-hole formed in the dielectric member. Further, the plasma processing apparatus includes a waveguide plate made of a dielectric material mounted in the injector so as to surround the through-hole of the dielectric member, and configured to guide the microwaves propagated into the dielectric member toward the through-hole to an inside of the injector.
US09343266B2
A charged particle beam pattern writing method according to an embodiment, includes measuring a position displacement amount of a stage above which a target object is placed, in a rotation direction; and writing a pattern of a beam image on the target object above the stage while the beam image is rotated, by using a plurality of electrostatic lenses at least one of which is arranged in a magnetic field of each of the plurality of electromagnetic lenses whose magnetic fields are in opposite directions, to avoid a focus displacement of a charged particle beam passing through the plurality of electromagnetic lenses and to correct the position displacement amount measured, in the rotation direction of the stage.
US09343264B2
In a panoramic image construction technology a wide-range imaging area (EP) of semiconductor patterns is divided into a plurality of imaging areas (SEP), and joined a group of images, which are obtained by imaging the SEPs using an SEM, through image processing. Although a pattern serving as a key to joining is not contained in an overlap area between some of the SEPs, all the images can be joined in some cases is noted so that: although the number of patterns serving as keys to joining is small, SEPs whose images are all joined can be determined; or even if such SEPs cannot be determined, SEPs satisfying user's request items as many as possible can be determined. The cases are extracted by optimizing an SEP arrangement, whereby the number of cases in which SEPs whose images are all joined can be determined is increased.
US09343263B2
A beam energy measuring device in an ion implanter includes a parallelism measuring unit that measures a parallelism of an ion beam at a downstream of a beam collimator of the ion implanter and an energy calculating unit that calculates an energy of the ion beam from the measured parallelism. The ion implanter may further include a control unit that controls a high energy multistage linear acceleration unit based on the measured energy of the ion beam so that the ion beam has a target energy.
US09343254B2
Disclosed is a battery relay for a vehicle. The battery relay has a strengthened operation structure, which includes divided upper plunger and lower plunger by dualizing an internal plunger and induces shocks of the upper plunger and the lower plunger upon initial movement of the lower plunger thereby minimizing the amount of arc generated upon contact and improving durability by shortening a switching time between a movable contact and a fixed contact.
US09343252B2
An arc extinguishing contact assembly for a circuit breaker assembly is provided. The arc extinguishing contact assembly includes a fixed contact assembly, a movable contact assembly and an arc extinguishing assembly. The fixed contact assembly includes a fixed arc contact assembly, a fixed main contact assembly, and a number of movable, intermediate arc contact assemblies. The movable contact assembly includes a movable arc contact assembly and a movable main contact assembly. The arc extinguishing assembly is structured to extinguish an arc generated as the movable contact assembly moves between an open, first position and a closed, second position.
US09343249B2
A pressure and rotationally actuated control element for a vehicle steering wheel includes a bearing block and an input element. The bearing block is mounted on actuating elements of switching elements. The input element is mounted rotatably on the bearing block. The input element transmits a rotational actuation to a code disk and an actuating pressure on the input element actuates at least one of the switching elements. The bearing block forms two swivel pins perpendicular to the axis of rotation of the input element and which are supported by the actuating elements of switching elements. The bearing block has a stop element between the swivel pins which limits the path of actuation of the input element by an actuating pressure.
US09343243B2
An actuation device (11) for an explosion-proof housing (10) in compliance with the ignition protection category “pressure-proof encapsulation”. The actuation device (11) has an actuation unit (15) with a manually actuatable actuation element (16), and an actuation device (11) having a switch unit (14) with a switch element (14) for switching an associated electrical contact. The actuation unit (15) is located outside the housing (10), whereas the switch unit (13) is located in the interior space (12) of the housing (10). An adapter device (22) mechanically connects the actuation unit (15) and the switch unit (13) and comprises at least one adapter plunger (38) that is supported so as to be movable in axial direction (A) in order to transmit the movement of the actuation element (16) via the adapter plunger (38) to the switch element (14). The adapter plunger (38) is arranged in an adapter channel (39) so as to be axially shiftable while forming a gap (53) that is resistant to ignition transmission.
US09343234B2
A monolithic ceramic electronic component includes an outer electrode including a first plating layer formed directly on a component body by electroless plating so as to cover an exposed portion distribution region including exposed portions of a plurality of inner electrodes and a second plating layer formed by electrolytic plating so as to cover the first plating layer. An amount of extension of the first plating E1 and an amount of extension of the second plating E2 satisfy the relationship E1/(E1+E2)≦20%, where E1 represents a distance from an edge of the exposed portion distribution region to an edge of the first plating layer, and E2 represents a distance from the edge of the first plating layer to an edge of the second plating layer.
US09343232B2
There is provided a conductive paste composition for an external electrode, the conductive paste composition including a polymer resin, spherical first conductive metal particles included in the polymer resin and being hollow in at least a portion thereof, and second conductive metal particles of a flake shape included in the polymer resin and being hollow in at least a portion thereof.
US09343216B2
In a bi-stable permanent magnet actuator system, an electrical circuit arrangement for activating bi-stable permanent magnet actuators that is more adaptable to energy saving power sources, includes a power source that can be of any power level, a voltage conditioner, an energy storage device, an output circuit, and a control circuit for controlling delivery of a discharge current from the energy storage device through the output circuit to the control coil of a bi-stable permanent magnet actuators. Thus, low voltage batteries, solar cells, and energy harvesting devices with low average watts (energy per time) can be used as the power source for bi-stable permanent magnet actuators.
US09343213B2
Provided is a component for fixing the curvature of a flexible device. The component includes a permanent magnet substrate and a magnetic substrate connect to the permanent magnet substrate. The permanent magnet substrate includes a first permanent magnet structure, and the magnetic substrate includes an electromagnet structure, a second permanent magnet structure, or a ferromagnetic material structure.
US09343206B2
A tunable resistance system includes a layer of a first functional material deposited on a component of the system. The first functional material undergoes a phase transition at a first critical voltage. An insulating layer is deposited upon the layer of first functional material. A layer of a second functional material deposited on the insulating layer. The second functional material undergoes a phase transition at a second critical voltage. The insulating layer is configured to induce a stress on the layer so as to change the first critical voltage. In this way, the resistance of the system is tunable, allowing the system to undergo multi-stage electrical switching of resistive states.
US09343205B2
A tubular cable protection and guide device is provided. The tubular cable protection and cable device includes an elastomer resin sheet that has: an outer circumference wall forming portion, a pair of sidewall forming portions on the left and right sides, and a pair of inner circumference wall forming portions on the left and right sides. The inner circumference wall forming portions have a pair of locking portions. When a cable receiving room is formed, the pair of locking portions is engaged with each other along a sheet longitudinal direction on a flexional inner circumference side, such that the inner circumference wall forming portions form a wall facing the outer circumference wall forming portion. The locking portions each includes a plurality of ridges that extend in the sheet longitudinal direction and are arranged in the transverse direction to be alternately inserted between each other when engaged with each other.
US09343204B2
An electrical insulator apparatus and methods of using the same are provided. The apparatus includes an insulator body formed about a central axis, the insulator body having a plurality of spaced fins positioned along an exterior of the insulator body. A first jaw portion is positioned on an upper portion of the insulator body. A second jaw portion is positioned proximate to the first jaw portion and is movable with respect to the first jaw portion. At least one fastener is connected between the first and second jaw portions. A jaw platform is positioned at least partially between the first and second jaw portions, wherein the first and second jaw portions and the jaw platform form a notch sized to receive an electrical conductor, wherein the jaw platform substantially lies within a first plane angled substantially between 6° and 184° with respect to the central axis of the insulator body.
US09343201B2
The invention relates to a method for manufacturing reinforced overhead multipurpose cable for outside telecommunications of Voice, Video, and Data Distribution (VVDD) type. The reinforced overhead multipurpose cable comprises a dry and multipair construction core, electromagnetic shielding elements and external protection thermoplastic cover, characterized because it includes one or several externally placed metal or plastic supporting elements for cable self-support; a core integrated by insulated electrical conductors of 2 to 300 twisted pairs, formed with twisting closed lay lengths and reduced in the formation of said component pairs; a plastic tape helicoidally arranged; a tape wrapping the assembled core; said tape being of aluminum for electromagnetic shielding and an external insulating cover both for the core and the reinforcement element, the dry core does not affect the conductance or capacitance or resistance of the insulation.
US09343197B2
An insulated wire includes a conductor, and an insulating covering layer including a first insulation layer formed around the conductor and a second insulation layer formed around the first insulation layer. An elastic modulus of the second insulation layer at 300° C. is not less than 300 MPa, and a relative permittivity of the insulating covering layer is not more than 3.0.
US09343194B2
A process for the formation of an electrically conductive silver back electrode of a PERC silicon solar cell comprising the steps: (1) providing a silicon wafer having an ARC layer on its front-side and a perforated dielectric passivation layer on its back-side, (2) applying and drying a silver paste to form a silver back electrode pattern on the perforated dielectric passivation layer on the back-side of the silicon wafer, and (3) firing the dried silver paste, whereby the wafer reaches a peak temperature of 700 to 900° C., wherein the silver paste has no or only poor fire-through capability and comprises particulate silver and an organic vehicle.
US09343193B2
An x-ray analysis apparatus for illuminating a sample spot with an x-ray beam. An x-ray tube is provided having a source spot from which a diverging x-ray beam is produced having a characteristic first energy, and bremsstrahlung energy; a first x-ray optic receives the diverging x-ray beam and directs the beam toward the sample spot, while monochromating the beam; and a second x-ray optic receives the diverging x-ray beam and directs the beam toward the sample spot, while monochromating the beam to a second energy. The first x-ray optic may monochromate characteristic energy from the source spot, and the second x-ray optic may monochromate bremsstrahlung energy from the source spot. The x-ray optics may be curved diffracting optics, for receiving the diverging x-ray beam from the x-ray tube and focusing the beam at the sample spot. Detection is also provided to detect and measure various toxins in, e.g., manufactured products including toys and electronics.
US09343190B2
An apparatus for the sterilization of containers with a conveying device which conveys the containers along a pre-determined conveying path (P), with a sterilization device which acts upon at least one area of the containers with charge carriers in the course of the sterilization, with a screening apparatus for screening off beams from the environment, which has at least two screening bodies which are arranged with respect to each other in such a way that one screening body is situated on the side of the screening apparatus facing the conveying path (P) and one screening body is situated on the one facing away from it, wherein the screening bodies are thermally insulated from each other.
US09343186B2
A semiconductor storage device has a cell array, a redundant array provided logically separated from the cell array, a cache memory having a storing area of data read from or written in the cell array by one access, defective column storage to store a column address of a defective column in the cell array, a defective column determination module to determine whether a column address to be accessed matches the column address stored in the defective column storage, and a clock generator to generate a clock for accessing each of the divided areas for each period of the interleave access and, when the defective column determination module determines that there is a match, instead of a clock accessing a divided page buffer area at the generation timing of the clock accessing the divided page buffer area.
US09343181B2
Techniques for handling errors on memory modules are provided. An uncorrected error from a pair of memory modules may be received. Memory modules other than the pair of memory modules producing the error may be de-configured. Diagnostic tests may be run on the faded pair of memory modules. The memory module of the pair of memory modules that caused the uncorrected error may be determined.
US09343177B2
An electronic apparatus that includes a controlled device with a plurality of control registers. A data bus is coupled between the controlled device and a processor, and an interface is configured to receive a plurality of portions of data read from or to be written to the plurality of control registers. The electronic apparatus also includes a correlation circuit configured to associate at least some of the plurality of portions of data with respective physical addresses of the plurality of control registers based on respective positions of the respective portions of data within the plurality.
US09343175B2
A fuse data reading circuit is configured to read fuse data in multi-reading modes. The fuse data may be stored in a fuse array that includes a plurality of fuse cells configured to store fuse data. The fuse data reading circuit may include a sensing unit configured to sense the fuse data stored in the fuse cells of the fuse array, and a controller configured to control an operation of reading the fuse data stored in the fuse cells. The controller sets different sensing conditions for sensing the fuse data according to an operation period during the fuse data reading operation to read the fuse data. Methods include operations and use of the fuse data reading circuit.
US09343172B2
Methods and systems are disclosed for extended erase protection for non-volatile memory (NVM) cells during embedded erase operations for NVM systems. The embodiments described herein utilize an additional threshold voltage (Vt) check after soft programming operation within an embedded erase operation completes to provide extended erase protection of NVM cells. In particular, the threshold voltages for NVM cells are compared against a threshold voltage (Vt) check voltage (VCHK) level and an additional embedded erase cycle is performed if any NVM cells are found to exceed the threshold voltage (Vt) check voltage (VCHK) level. The threshold voltage (Vt) check voltage (VCHK) level can be, for example, a voltage level that is slightly higher than an erase verify voltage (VEV) level and lower than read voltage level (VR).
US09343169B2
Methods of programming a memory, memory devices, and systems are disclosed, for example. In one such method, each data line of a memory to be programmed is biased differently depending upon whether one or more of the data lines adjacent the data line are inhibited. In one such system, a connection circuit provides data corresponding to the inhibit status of a target data line to page buffers associated with data lines adjacent to the target data line.
US09343155B1
Methods for programming, methods for operating, and memories are disclosed. One such method for programming includes programming a group of memory cells such that a series string of memory cells of the group of memory cells is programmed to provide a logical function responsive to an input minterm whose variables are coupled to respective, associated memory cells.
US09343154B2
According to example embodiments, a nonvolatile memory device includes a plurality of strings having a plurality of serially-connected selection transistors and a plurality of memory cells connected in series to one end of the serially-connected selection transistors. A control logic is configured to perform a program operation for setting a threshold voltage of at least one of the serially-connected selection transistors.
US09343148B2
A device for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states comprising a sensing circuit, a settling circuit, a prebiasing circuit, and a resistor coupled in parallel to the resistive memory cell, wherein the resistor is configured to reduce an effective resistance seen by the prebiasing circuit. The sensing circuit is configured to sense a sensing voltage of the resistive memory cell and output a resultant value in response to the sensing voltage which is indicative for the actual cell state. The settling circuit is configured to settle the sensing voltage to a certain target voltage representing one of the M programmable cell states. The prebiasing circuit is configured to prebiase a bitline capacitance of the resistive memory cell such the sensing voltage is close to the certain target voltage.
US09343147B2
By arranging both a conductive and non-conductive resistive memory cell in a cross coupled arrangement to facilitate reading a data state the memory cells can have very small differences in their resistance values and still read correctly. This allows both of the memory cells' resistances to change over time and still have enough difference between their resistances to read the desired data state that was programmed. A pair of ReRAM or CBRAM resistive memory devices are configured as a one bit memory cell and used to store a single data bit wherein one of the resistive memory devices is in an ERASE condition and the other resistive memory devices of the pair is in a WRITE condition. Reading the resistance states of the resistive memory device pairs is accomplished without having to use a reference voltage or current since a trip-point is between the conductive states thereof.
US09343145B2
Embodiments disclosed include memory cell operating methods, memory cell programming methods, memory cell reading methods, memory cells, and memory devices. In one embodiment, a memory cell includes a wordline, a first bitline, a second bitline, and a memory element. The memory element is electrically connected to the wordline and selectively electrically connected to the first bitline and the second bitline. The memory element stores information via a resistive state of the memory element. The memory cell is configured to convey the resistive state of the memory element via either a first current flowing from the first bitline through the memory element to the wordline or a second current flowing from the wordline through the memory element to the second bitline.
US09343144B2
According to one embodiment, a memory device includes a plurality of global column lines arranged in parallel and extending in a first direction; a plurality of row lines extending in a second direction which is perpendicular to the first direction; a plurality of column lines in a two-dimensional arrangement, which extend in a third direction which is perpendicular to the first direction and the second direction; and a memory cell array including a plurality of memory cells arranged at intersections between the row lines and the column lines.
US09343137B2
The semiconductor memory device includes a power control signal generator and a sense amplifier circuit. The power control signal generator generates a first power control signal that is enabled in response to a temperature latch signal generated in response to latching a temperature signal in a predetermined mode. The sense amplifier circuit generates a first power signal having a first drive voltage in response to the first power control signal. In addition, the sense amplifier circuit senses and amplifies a voltage level of a bit line using the first power signal as a power supply voltage.
US09343126B2
Clock signal generation circuitry. A frequency multiplier is coupled to receive a clock signal and to generate a frequency-multiplied clock signal. A switching circuit is coupled to receive at least two reference clock signals. The switching circuit provides one of the reference clock signals in response to a reference select signal. A phase locked loop (PLL) is coupled to receive the frequency-multiplied clock signal and the selected reference clock signal. The PLL generates an output clock signal.
US09343124B1
A method and system for operating a multi-port memory system are disclosed. A memory controller may service read requests by accessing requested data from an external memory and communicating it to the requesting memory ports for access by devices coupled to the memory ports. A shared memory of the memory controller may be used to temporarily store data if a buffer associated with a requesting device is full. To reduce the ability for a slower memory port to occupy the shared memory and cause faster memory ports to be underserviced, the memory controller may advantageously regulate or limit issuance of read requests by memory ports operating at slower clock frequencies. The memory ports may be regulated independently of one another based on at least one respective attribute of each memory port, at least one attribute of the external memory, etc.
US09343122B2
A circuit configuration includes a first input for inputting a first set of digital input data, an output for outputting digital output data, and a control input for receiving a control signal. At least two register units are provided and the circuit configuration is designed to write, as a function of the control signal, into a first register unit optionally at least a part of the first set of input data or of the second set of digital input data and to write into a second register unit optionally at least a part of the first set of input data or of the second set of input data.
US09343120B2
A semiconductor device in which the power consumption of a register is low is provided. Further, a processing unit whose operation speed is high and whose power consumption is low is provided. In the semiconductor device, a register operating at high speed and a nonvolatile FILO (first-in-last-out) register capable of reading and writing data from/to the register are provided.
US09343114B2
Some embodiments include methods of forming electrical contacts. A row of semiconductor material projections may be formed, with the semiconductor material projections containing repeating components of an array, and with a terminal semiconductor projection of the row comprising a contact location. An electrically conductive line may be along said row, with the line wrapping around an end of said terminal semiconductor projection and bifurcating into two branches that are along opposing sides of the semiconductor material projections. Some of the semiconductor material of the terminal semiconductor projection may be replaced with dielectric material, and then an opening may be extended into the dielectric material. An electrical contact may be formed within the opening and directly against at least one of the branches. Some embodiments include memory arrays.
US09343110B2
The present disclosure relates to systems and methods for synchronizing one or more mediatations with a video timeline. A mediatation may refer to any media content displayed in a separate window from a video stream. Example mediatations include, but are not limited to, portable document format (PDF) documents, text documents, and image documents. Mediatations are associated with a timeline for a video stream. As the video stream is played, different indications of mediatations may appear in a window separate from the window playing the video. A user may then select an indication of a mediatation to display the entirety of the mediatation.
US09343106B2
In a controller of a tape drive, when an error recovery section cannot recover an error detected by an error detecting section, an error-report generation section generates an error report, an error-information acquisition section acquires error information of the tape drive and a cartridge loaded in the tape drive, an error-information exchange section acquires pieces of error information of other tape drives and cartridges loaded in these other tape drives, an error-factor judging section judges whether the error is attributable to the tape drive or the cartridge based on these pieces of error information, an error-report update section updates the error report in accordance with the result of this judgment, and an error-report output section outputs the error report thus updated to a host.
US09343103B2
A method is provided to enable communication between a controller and a preamplifier in a storage device. For example, the method includes implementing a serial port which is configured to transmit digital signals between the controller and the preamplifier over a single bidirectional serial data line. The serial port is controlled to selectively transmit digital signals over the bidirectional serial data line in either a first direction from the controller to the preamplifier or a second direction from the preamplifier to the controller.
US09343102B1
A data storage device is disclosed comprising a disk, a spindle motor configured to rotate the disk, wherein the spindle motor comprises a plurality of windings, and a head actuated over the disk. The windings are commutated based on a commutation sequence while applying a periodic driving voltage to each winding, wherein the periodic driving voltage comprises an operating amplitude during normal operation. When a supply voltage falls below a threshold, the spindle motor is configured into a power generator by at least adjusting a phase of the periodic driving voltage by a phase offset and adjusting the amplitude of the periodic driving voltage based on the phase offset.
US09343096B2
According to one embodiment, a perpendicular magnetic recording medium is provided, which includes a non-magnetic granular underlayer formed on a substrate and containing metal grains of a first metal and a grain boundary layer surrounding the metal grains, each metal grain including a projection projecting from the boundary layer and a bottom portion embedded in the grain boundary layer, and a contact angle of the edge of the projection to the surface of the grain boundary layer being 45° to 85°, a non-magnetic intermediate layer formed on a surface of each projection and a magnetic recording layer having a projection pattern formed on the basis of a pattern of the projections in the non-magnetic intermediate layer via the non-magnetic intermediate layer.
US09343092B1
A method includes a first communication device detecting vibration or shock, and, in response to detecting vibration or shock, the first communication device broadcasting an alert message that identifies a physical location of the first communication device at the time that the vibration or shock was sensed. The method further includes a second communication device receiving the alert message, wherein the second communication device includes a hard disk drive that can be damaged by vibration or shock. In response to receiving the alert message, the second communication device temporarily parks a read-write head of the hard disk drive to prevent damage from the vibration or shock, wherein the second communication device parks the read-write head without the second communication device independently detecting the vibration or shock. In one option, a server can receive and send alert messages from and to any number of communication devices.
US09343091B1
A reader sensor having a composite shield and a sensor stack. The composite shield includes a high magnetic moment layer having a magnetic moment greater than 1.0 T, a low magnetic moment layer, and a spacer therebetween. The high magnetic moment layer is closer to the stack than the low magnetic moment layer. The high magnetic moment layer may be a single layer or have a plurality of layers.
US09343090B1
A magnetic sensor having an Ir seed layer for improved pinning robustness and improved sensor performance. The sensor includes an Ir seed layer formed directly beneath and in contact with a layer of antiferromagnetic material (AFM). The Ir seed layer improves the grain structure and smoothness of the above applied layers to significantly improve the performance and pinning robustness of the sensor. The use of the Ir seed layer reduces interlayer magnetic coupling of the layers, reduces surface roughness and increases the temperature at which the pinned layer looses it's pinning (i.e. raises the mean blocking temperature Tc of the pinned layer structure).
US09343086B1
A method and system provide a magnetic transducer having an air-bearing surface (ABS). The magnetic transducer includes a main pole and at least one coil for energizing the main pole. The main pole includes a pole tip region and a yoke region. The pole tip region includes sidewalls, a bottom and a top wider than the bottom. At least one of the sidewalls forms a first sidewall angle with a down track direction at the ABS and a second sidewall angle with the down track direction at a first distance recessed from the ABS. The first sidewall angle is greater than the second sidewall angle.
US09343084B2
Systems and methods for correcting slider parallelism error using compensation lapping are described. One such system includes a lapping support including at least one mounting surface having a preselected mounting angle such that a line normal to the at least one mounting surface is not parallel to a centerline of the lapping support, a rowbar including a plurality of magnetic transducers spaced apart along a length of the rowbar, and a lapping plate configured to lap the rowbar, where the rowbar is mounted to the at least one mounting surface, and where the rowbar is configured to be brought into contact with the lapping plate.
US09343082B2
Various embodiments of the present invention provide systems and methods for determining contact with a storage medium. As an example, a data storage system is disclosed that includes: a head assembly and a data processing circuit. The head includes a head disk interface sensor operable to provide a contact signal indicating contact between the head and a storage medium disposed in relation to the head. The data processing circuit is operable to process the contact signal to yield an indication of a contact between the storage medium and the head.
US09343081B2
A magnetic business communication is produced in a unique manner in which a pigmented coating is applied over one face of the magnetic substrate so as to change the appearance of the magnetic material. An image is applied either directly over the pigmented coating or alternatively, the image may be reverse printed on a transparent film such that when the film is applied over the pigmented coating, the image will be visible through the face of the film.
US09343078B2
An acoustic processing apparatus is provided. The apparatus includes a pre-processing component, a filter and a first signal processing component. The pre-processing component compensates a non-linearity of a reference signal to generate an input signal. The filter coupled to the pre-processing component, the filter executes filtering on the input signal to generate an output signal. The first signal processing component, coupled to the pre-processing component, the reference signal obtains a gain from the first signal processing component to generate a first signal, and the first signal processing component passes the gain to the pre-processing component.
US09343077B2
In some embodiments, a pitch filter for filtering a preliminary audio signal generated from an audio bitstream is disclosed. The pitch filter has an operating mode selected from one of either: (i) an active mode where the preliminary audio signal is filtered using filtering information to obtain a filtered audio signal, and (ii) an inactive mode where the pitch filter is disabled. The preliminary audio signal is generated in an audio encoder or audio decoder having a coding mode selected from at least two distinct coding modes, and the pitch filter is capable of being selectively operated in either the active mode or the inactive mode while operating in the coding mode based on control information.
US09343075B2
A voice processing apparatus includes: a dividing unit which divides a voice signal into frames in such a manner that any two successive frames overlap each other by a predetermined amount; a first windowing unit which multiplies each frame by a first windowing function that attenuates a signal at both ends of the frame; an orthogonal transform unit which computes a frequency spectrum for each frame multiplied by the first windowing function; a frequency signal processing unit which computes a corrected frequency spectrum; an inverse orthogonal transform unit which computes a corrected frame by applying an inverse orthogonal transform to the corrected frequency spectrum; a second windowing unit which multiplies each corrected frame by a second windowing function that attenuates a signal at both ends of the corrected frame; and an addition unit which adds up the each corrected frame multiplied by the second windowing function, sequentially in time order.
US09343073B1
The present technology provides adaptive noise and echo reduction of an acoustic signal which can overcome or substantially alleviate problems associated with mistaken adaptation of speech and noise models to acoustic echo. The present technology carries out a multi-faceted analysis to identify echo within the near-end acoustic signal to derive an echo model. Echo classification information regarding the derived echo model is then utilized to build near-end speech and noise models. These echo, speech, and noise models are then used to generate one or more signal modifications applied to the acoustic signal to preserve the desired near-end speech signal and reduce the echo and near-end noise signals. By building near-end speech and noise models utilizing echo classification information, the present technology can prevent adaptation of the speech and noise model to the acoustic echo.
US09343069B2
In an embodiment, a system maintains a database of a plurality of persons. The database includes an audio clip of a pronunciation of a name of a first person in the database. The system determines from a calendar database that a second person has an event in common with the first person, and transmits to a device associated with the second person an indication that the database includes the pronunciation of the name of the first person.
US09343068B2
A method for controlling access to a plurality of applications in an electronic device includes receiving a voice command from a speaker for accessing a target application among the plurality of applications, and verifying whether the voice command is indicative of a user authorized to access the applications based on a speaker model of the authorized user. In this method, each application is associated with a security level having a threshold value. The method further includes updating the speaker model with the voice command if the voice command is verified to be indicative of the user, and adjusting at least one of the threshold values based on the updated speaker model.
US09343060B2
In voice processing, a first distribution generation unit approximates a distribution of feature information representative of voice of a first speaker per a unit interval thereof as a mixed probability distribution which is a mixture of a plurality of first probability distributions corresponding to a plurality of different phones. A second distribution generation unit also approximates a distribution of feature information representative of voice of a second speaker as a mixed probability distribution which is a mixture of a plurality of second probability distributions. A function generation unit generates, for each phone, a conversion function for converting the feature information of voice of the first speaker to that of the second speaker based on respective statistics of the first and second probability distributions that correspond to the phone.
US09343056B1
Wind noise is detected in and removed from an acoustic signal. Features may be extracted from the acoustic signal. The extracted features may be processed to classify the signal as including wind noise or not. The wind noise may be removed before or during processing of the acoustic signal. The wind noise may be suppressed by estimating a wind noise model, deriving a modification, and applying the modification to the acoustic signal. In audio devices with multiple microphones, the channel exhibiting wind noise (i.e., acoustic signal frame associated with the wind noise) may be discarded for the frame in which wind noise is detected.
US09343054B1
Techniques are described for automatically re-ordering digital music tracks in a sequence for playback on a digital device. The sequence of digital music tracks is algorithmically arranged to provide better transitions between the digital music tracks in the sequence.
US09343053B2
A method of adding sound effects to movies, comprising: opening a file comprising audio and video tracks on a computing device comprising a display and touch panel input mode; running the video track on the display; selecting an audio sound suitable to a displayed frame from an audio sounds library; and adding audio effects to said selected audio sound using hand gestures on displayed art effects.
US09343045B1
A capo system includes a stringed instrument that has a neck, a fret board and a plurality of strings. A housing is removably positioned at a desired location along the fret board. A plurality of engaging units is provided and each of the engaging units is positioned within the housing. Each of the engaging units is positioned within an associated one of the channels. Each of the engaging units is positionable between an engaging position having each of the engaging units selectively depressing associated ones of the strings onto the fret board. Each of the engaging units is positionable in a releasing position having each of the engaging units being spaced from the associated string such that the associated string is spaced from the fret board.
US09343044B2
A piano selectively playable in normal and soft modes has multiple piano keys and actions, including a wippen assembly, and multiple piano hammers. A soft mode pedal system includes soft and ultra-soft mode pedals, and a hammer rest rail mounted for movement between normal and soft mode positions. A piano key lift rail is mounted for movement between a normal mode position spaced from lifting contact with the keys and a soft mode position in contact with and lifting the keys and the wippen assemblies. A soft mode pedal linkage assembly between the soft and ultra-soft mode pedals and the hammer rest and piano key lift rails causes movement of the hammer rest rail, piano hammers, the piano keys, and the wippen assemblies upon actuation of the soft mode pedal between normal mode position and soft and ultra-soft mode positions.
US09343043B2
Apparatuses and methods for capturing and generating composite images. In various aspects, the invention provides apparatuses and methods for correcting position information of captured images received by position sensors based on alignment of overlapping images. Corrected position information is then taken into account when displaying the locations of captured images on a display for providing guidance to users for generating composite images.
US09343036B2
An electronic apparatus and an operation method thereof are provided. In case that a display unit enters a screen lock mode, a message input interface is displayed on the display unit when it is detected that a message option is enabled, and a note message is generated by the message inputting interface. A lock screen is returned and a prompt item corresponding to the note message is displayed on the lock screen when the message input interface is finished.
US09343035B2
A video transmission method is provided. The video transmission method includes providing a wireless transmission environment for transmitting a video, wherein the wireless transmission environment includes an application layer, a media access control (MAC) layer and a physical layer; detecting a delay bound and a frame error rate (FER) of the video in the wireless transmission environment; detecting a present packet error rate (PER) of a packet in the physical layer when the physical layer transmits an error report to the MAC layer; calculating an estimated PER; comparing the present PER and the estimated PER for providing a determined result; and calculating an optimal video rate of the video and an optimal payload length of the packet using a geometric programming scheme when the determined result indicates that a retransmission is required, wherein the geometric programming scheme is based on the delay bound and the FER.
US09343032B2
A GOA circuit structure includes multiple twined GOA units cascaded with each other. Each twined GOA unit includes a (2N−1)-level GOA unit and a 2N-level GOA unit, which has a first pull-down holding circuit, a second pull-down holding circuit, a third pull-down holding circuit, and a fourth pull-down holding circuit connected with the (2N−1)-level gate signal point (Q(2N−1)) and the 2N-level gate signal point (Q(2N)). Through inputting a first clock signal, a second clock signal, a third clock signal, and a fourth clock signal, the first pull-down holding circuit, the second pull-down holding circuit, the third pull-down holding circuit, and the fourth pull-down holding circuit are made working alternately. The GOA circuit structure makes each portion work for ¼ time and take rest for ¾ time by sharing the pull-down holding circuit, which can reduce the TFT stress of the pull-down holding circuit.
US09343028B2
A method of driving a gate line includes: charging one of a scan start signal and a carry signal provided from a previous stage to a first node of a present stage; outputting a gate signal through a gate node of the present stage by pulling up a high level of a first clock signal at the first node to boost up a voltage potential of the first node; discharging the voltage potential of the first node and a voltage potential of the gate node to hold the first node and the gate node at a first power voltage as the first clock signal is shifted to a low level; and receiving a voltage potential signal of a second node of the previous stage, the second node holding a gate signal outputted from the previous stage, to reduce a ripple generated at the first node.
US09343014B2
A pixel driving circuit includes first to seventh switches, a capacitor and a light emitting unit. The first and sixth switches are connected and receive data voltage and second reference voltage according to second and third control signals, respectively. One capacitor end connects to the serial-connected first and sixth switches and the other capacitor end connects to a control end of the second switch. The serial-connected third and fourth switches are connected between the control and first end of the second switch. The third and fourth switches are ON by the second control signal. The fifth switch is ON by a first control signal. An end of the fifth switch connects to the serial-connected third and fourth switches and another end receives a first reference voltage. The seventh switch is connected between the second switch and the light emitting unit. The seventh switch is ON by the third control signal.
US09343005B2
An extrusion member for assembly into a display fabric supporting frame arrangement for enabling the assembly and display of a flexible fabric therewithin. The extrusion member comprises an elongated outer segment for enabling the support of a frameless flexible display in a frame arrangement, and an elongated inner segment for enabling the support of a frameless flexible display in a frame arrangement, wherein either segment or the inner segment, or both the outer segment and the inner segment may peripherally support a flexible display on a common extrusion member assembly.
US09343004B2
An LCD destination sign is provided that provides a high resolution image and operates in at least two modes. One mode is a destination message mode that is used when a destination message (i.e., a route number and/or destination name in substantially static alphanumeric or symbols) is to be displayed on the destination sign. The second mode is a non-destination mode wherein graphic images are displayed on the destination sign, wherein such graphic images do not provide a destination message and may include video feeds, weather forecasts or newsreels.
US09343003B2
A graphic display device illuminates interchangeable graphic panels and is mountable to a translucent mounting surface. The graphic display device includes a housing assembly, a light source assembly, a light guide assembly, and device-to-surface mounts. The housing assembly includes a housing back, a housing front, and peripheral housing edging. Together, the housing back and housing edging define a panel-receiving volume. The light source assembly includes a power source, a light source, and circuitry. A light guide of the light guide assembly is positionable within the panel-receiving volume for guiding light from the light source in an anterior direction. The device-to-surface mounts fasten the graphic display device to a translucent mounting surface, and are cooperably associated with the peripheral housing edging for supporting the housing assembly such that the light from the light source is guided in an anterior direction through the translucent mounting surface.
US09342999B2
The present application is directed to systems and methods for an information delivery system for a container. At least one machine readable indicia may be printed on an outer surface of the container. A top label may cover at least a portion of the outer surface of the container. The top label may be rotatable about the outer surface of the container. The top label may have a transparent window allowing at least one of the machine readable indicia to be visible through the transparent window.
US09342996B2
A system for simulating one or more hemorrhages in order to provide a more dynamic and realistic hemorrhage simulation in order to train medical personnel and other critical care givers, such as first responders, medics, and emergency medical technicians (EMTs) on treating hemorrhages. The system includes a reservoir, a flow controller, and at least one conduit connected to at least one simulated wound site wherein the system supplies fluid to the simulated wound site in order to simulate a hemorrhage. The system may further include a plurality of wound sites that have their respective fluid flows controlled by the fluid flow controller. In at least one embodiment, the reservoir and the flow controller are housed within a bag. In at least one embodiment, the system further includes an audio system for providing audio cues to the simulation participants to enhance the realism of the simulation.
US09342989B2
In the method of reducing the likelihood of collisions, the improvement comprising the step of embedding passive radio transponders in a tape, grease, or other materials; applying said passive radio transponders to an object of which collisions must be avoided, and mounting an active interrogating transponder on a moving machinery, which uses the information provided by the radio transponders to semi-autonomously avoid collisions.
US09342982B2
Embodiments relate to traffic control resource planning. An aspect includes receiving information about available routes in a transportation network and receiving an estimate of a traffic demand in the transportation network. Traffic control planning is performed and it may include: simulating a traffic flow based on the available routes and the traffic demand; applying a model that varies traffic control agent (TCA) placement and traffic signal settings in the transportation network to minimize a cost associated with the traffic flow, the cost including a TCA deployment cost and a traffic delay cost; and outputting a traffic control plan based on the applying, the traffic control plan including a TCA placement and traffic signal setting plan.
US09342973B2
The present disclosure proposes a method of handling a fall event for use by a handheld mobile electronic device, and a handheld mobile electronic device using the same method. Accordingly, the handheld mobile electronic device first detects a fall event. In response to the fall event determined to have exceeded a predetermined distance, the device would detect whether the device has moved or has experienced a pressure variation within a time period after the fall event has ended. If the result is negative, the device would activate an alarm and transmit a notification related to the fall event.
US09342967B2
The claimed subject matter provides systems and/or methods that facilitate remotely controlling a wireless lighting module. The wireless lighting module can include a power source such as a battery, a solar cell, and the like as well as an array of light emitting diodes (LEDs). The LEDs can be controlled based upon a received input (e.g., communicated by way of a radio frequency signal, an infrared signal, . . . ). For example, the input can be obtained from a remote control, a sensor, a differing wireless lighting module, an radio frequency identification (RFID) tag, and so forth. The input can be utilized to switch one or more LEDs on or off, change the intensity or color of illumination, modulate illumination, alter the direction of illumination, etc.
US09342966B2
A method and system for determining restricted apparatuses with respect to a location is provided. The method includes determining that a user is in possession of a restricted apparatus. A video based process and a global positioning system (GPS) based process is executed with respect to the restricted apparatus and a location associated with a user. Restrictions associated with the restricted apparatus with respect to the location associated with the user are determined based on results of the video based process and the GPS based process. The restrictions are presented to the user.
US09342965B2
In one example embodiment, a mobile computing device provides assistance services for visitors at events which involve large crowds and long distances. The mobile computing device may be used to read a unique identifier for a visitor from an identification token for the visitor. The mobile computing device may then send visitor location data for the current location of the visitor to a remote command center. The mobile computing device may then receive leader location data from the remote command center. The leader location data may identify a last known location for a leader of a group of visitors that includes the visitor. After receiving the leader location data, the mobile computing device may compute directions from the current location of the visitor to the last known location of the leader, and the mobile computing device may display those directions on a map. Other embodiments are described and claimed.
US09342964B2
A deposit module is described. The deposit module comprises: a port for receiving a bunch of media items; a bunch characterization device operable to characterize the bunch prior to individual media items being removed from the bunch of media items; and a media separator for removing individual media items from the bunch and for transporting the removed individual media items to a media item validator subsequent to characterization of the bunch of media items.
US09342958B2
In one embodiment, the gaming device and method disclosed herein provides a player one or more modifiers to apply to different components or characteristics of a game. In one such embodiment, the gaming device enables a player to selectively apply or associate a plurality of modifiers to a single game component or apply the plurality of modifiers across the plurality of game components. For each game component with at least one applied modifier, the gaming device disclosed herein modifies said game component based on each applied modifier. The gaming device generates any awards based on any modified game components and any unmodified game components and provides any generated awards to the player.
US09342957B2
A method of gaming comprising: determining which of a plurality of gaming devices, each operable for independent play of one or more games, are eligible for an additional game; initiating an additional game; and determining in response to initiation of the additional game, which eligible gaming devices will participate in the initiated additional game, the determination including a random determination in respect of at least one of the eligible gaming devices to determine whether the respective eligible gaming device will participate in the additional game.
US09342951B2
A secure architecture can provide a wagering game establishment access to the utility and entertainment value of online social communities. An architecture that employs an internal entity that controls import and export of data (“import/export controller”) and an external entity that operates as a liaison (“data liaison”) between the import/export controller and one or more online social communities allows this access in a secure manner. The import/export controller and the data liaison handle data transmissions (e.g., data streams, data updates, etc.) between the secure entity and the one or more online social communities. The import/export controller applies rules that regulate import and export of data, and the data liaison allows the import/export controller to operate in obscurity. Funneling data transmissions through the import/export controller and the data liaison allows players to securely access an online social community from a wagering game machine while in a wagering game establishment.
US09342949B2
Highly entertaining games are provided. When a trigger condition is established in a normal game, the following processes are executed: a process of shifting to a bonus game in which a re-trigger condition which is less stringent than the trigger condition may be established; a process of executing a free game at least once in the bonus game; and a process of increasing the number of times of execution of the free game in the bonus game, when the re-trigger condition is established in the bonus game.
US09342948B2
Some embodiments include a method for conducting a multi-player wagering game. The method can include determining, by at least on processor, a head position of a player of the multi-player wagering game. The method can also include determining, based on the head position, a viewable portion of a virtual object used in the multi-player wagering game, and causing presentation of the viewable portion of the virtual object.
US09342923B2
Systems and methods for reducing the amount of texture cache memory needed to store a texture atlas by using uniquely grouped refined triangles to create each texture atlas.
US09342918B2
Water surface and other effects are efficiently simulated to provide real time or near real time imaging on low-capacity computer graphics computation platforms. Water and other surfaces are modeled using multiple independent layers can be dynamically adjusted in response to real time events. The number of layers used in a given area can be adjusted to reduce computational loading as needed. Different algorithms can be employed on different layers to give different effects. The multiple layer modeling is preferably converted to polygons using an adaptive polygon mesh generator based on camera location and direction in the 3D world to provide automatic level of detailing and generating a minimal number of polygons. The visual effects of water droplets and other coatings on see-through surfaces can be modeled and provided using indirect texturing.
US09342917B2
In some embodiments, a system and/or method may include accessing three-dimensional (3D) imaging software on a remote server. The method may include accessing over a network a 3D imaging software package on a remote server using a first system. The method may include assessing, using the remote server, a capability of the first system to execute the 3D imaging software package. The method may include displaying an output of the 3D imaging software using the first system based upon the assessed capabilities of the first system. In some embodiments, the method may include executing a first portion of the 3D imaging software using the remote server based upon the assessed capabilities of the first system. In some embodiments, the method may include executing a second portion of the 3D imaging software using the first system based upon the assessed capabilities of the first system.
US09342910B2
Systems, processes, and computer program products for creating visual designs and arrangements that originate from an image or images are provided. In particular, the present subject matter relates to systems, processes, and computer program products for taking captured images of an intended operating environment and creating visual designs that create visual confusion that can be utilized to disguise a recognizable form of a person or an object by breaking up its outline using portions, magnifications and distortions of a single captured image, portions, magnifications and distortions of multiple captured images, and/or disruptive patterns that can projected on an image screen or can be printed on a material.
US09342903B2
When an image for PET attenuation correction is generated from an MR image, the MR image captured by MRI is segmented into regions according to pixel values. In a region in which a radiation attenuation coefficient is considered to be uniform, a radiation attenuation correction value is determined by referring to an existing radiation attenuation correction value table. In a region including multiple tissues having different radiation attenuation coefficients, a radiation attenuation correction value is determined by referring to a standard image. In such a manner, an image for PET attenuation correction in which tissues having similar pixel values in the MR image but different attenuation coefficients for radiation can be distinguished and that can accommodate individual differences and an affected area such as a space occupying lesion (for example, a cancer, abscess, or the like) and an organic defect is generated.
US09342902B2
Disclosed are a method and apparatus for improving image reconstruction speed, to improve the image reconstruction speed by acquiring optimal thread configurations of execution units under different scanning conditions. The method includes: acquiring scanning data and extracting an image-construction parameter from the scanning data; generating thread configurations each comprising the numbers of threads in respective image reconstruction execution units, and obtaining image reconstruction speeds corresponding to the thread configurations by performing image reconstruction on the scanning data with the thread configurations; and obtaining image reconstruction speeds meeting a preset condition, grouping the thread configurations, which correspond to the image reconstruction speeds meeting the preset condition, into a candidate set, and extracting a thread configuration from the candidate set as an optimal thread configuration to be used in image reconstruction of the scanning data having the image-construction parameter.
US09342900B1
The disclosure includes a system and method for distinguishing between stock keeping units of similar appearance that vary in size. An image recognition application receives an image depicting a plurality of items, identifies each item in the image, generates a region of interest for each identified item in the image, determines a pixel dimension of the region of interest for each identified item, determines whether one of the identified items in the image is a reference marker with a stored physical dimension, determines a pixel-to-physical dimension ratio for the reference marker using the dimension in pixels and stored physical dimension of the reference marker, and determines a stock keeping unit identifier of each identified item in the image based on the pixel-to-physical dimension ratio and the pixel dimension of the region of interest for each identified item.
US09342892B2
Systems and methods convert to binary an input image having pixels defining text and background. Thresholds are determined by which pixels in the input image and a corresponding blurred image will be defined as either binary black or binary white. Thresholds derive from grouped together neighboring pixels having pixels separated out that correspond to the background. For pixels of the input image defined as binary black and having corresponding pixels in the blurred image defined as binary black relative to their thresholds, those are set to black in the binary image, else they are set white. Techniques for devising thresholds, blurring images, grouping together pixels, statistical analysis, etc., typify the embodiments.
US09342890B2
A method for optically scanning and measuring a scene by a three-dimensional (3D) measurement device in which multiple scans are generated to then be registered in a joint coordinate system of the scene. At first at least one cluster is generated from at least one scan, further scans are registered for test purposes in the coordinate system of the cluster, if specified quality criteria are fulfilled and the generated clusters are then joined, for which purpose clusters are selected, registered for test purposes and registering is confirmed if appropriate, wherein the clusters to be joined are visualized with an optional possibility for the user to intervene, for supporting the selection of clusters.
US09342886B2
Components, methods, and apparatuses are provided that may be used to access information pertaining to a two-dimensional image of a three-dimensional object, to detect homography between said image of said three-dimensional object captured in said two-dimensional image indicative of said three-dimensional object and a reference object image and to determine whether said homography indicates pose suitable for image augmentation based, at least in part, on characteristics of an elliptically-shaped area that encompasses at least some of a plurality of inliers distributed in said two-dimensional image.
US09342885B2
Method of generating a multi-modality anatomical atlas. The method includes receiving first and second medical images of a region-of-interest (ROI) of a same individual. The first and second medical images are acquired by different first and second imaging modalities. The method includes generating first and second feature images based on the first and second medical images. The first and second feature images include a same designated anatomical feature of the ROI. The method includes determining a transformation function by registering the first and second feature images and applying the transformation function to the first and second medical images to register the medical images. The method includes generating a multi-modality anatomical atlas. The multi-modality atlas has the first and second medical images. The first and second medical images are first and second reference images. The multi-modality anatomical atlas includes an organ model that corresponds to an organ in the ROI.
US09342882B2
A method for determining a concentration of a contrast agent in imaging data includes calculating a pre-contrast attenuation map of a region of interest of a patient. Following an administering of a contrast agent to the patient, a post-contrast attenuation map of the region of interest of the patient is calculated. An increase in attenuation value is determined based on the pre-contrast attenuation map and the post-contrast attenuation map and a contrast agent concentration map is calculated for the region of interest based on the increase in attenuation value.
US09342874B2
A technique for determining noise is provided that suppresses misrecognition of significant components in an image as noise in any image captured under any condition. A noise determination apparatus for determining noise in image data that is input in units of frames decomposes the image data into frequency components, samples a predetermined number of data pieces for low-frequency components that have relatively low frequencies and a predetermined number of data pieces for high-frequency components that have relatively high frequencies from the frequency components, and analyzes whether or not the image data includes an edge image, on the basis of a ratio of high-frequency data to low-frequency data.
US09342871B2
Techniques to capture and fuse short- and long-exposure images of a scene from a stabilized image capture device are disclosed. More particularly, the disclosed techniques use not only individual pixel differences between co-captured short- and long-exposure images, but also the spatial structure of occluded regions in the long-exposure images (e.g., areas of the long-exposure image(s) exhibiting blur due to scene object motion). A novel device used to represent this feature of the long-exposure image is a “spatial difference map.” Spatial difference maps may be used to identify pixels in the short- and long-exposure images for fusion and, in one embodiment, may be used to identify pixels from the short-exposure image(s) to filter post-fusion so as to reduce visual discontinuities in the output image.
US09342866B2
In accordance with an example embodiment a method and apparatus is provided. The method comprises facilitating receiving of a first image and a second image. The method also comprises facilitating receiving of location information of a movable object and generating a panorama image based on the first image, the second image and the location information of the movable object.
US09342861B2
Described are computer-based methods and apparatuses, including computer program products, for alternate viewpoint rendering. A first image and a set of pixel-shift values for the pixels in the first image are received. A portion of a second image is generated, the second image comprising a different viewpoint than a viewpoint of the first image. A first pixel from the set of pixels is selected based on the different viewpoint. A first destination pixel is identified for the first pixel in the second image based on a pixel-shift value from the set of pixel-shift values associated with the first pixel. A value of the first destination pixel is determined based on at least one of (a) a previously considered pixel from the set of pixels of the first image that is horizontally adjacent to the first pixel or (b) the pixel-shift value associated with the first pixel.
US09342852B1
A method includes receiving login with a first identity. The first identity is associated with a first set of privileges. The reception of login with the first identity enables a first presentation of content associated with a first user account. The content is displayed on a page that has a visual indicator identifying the first user account. The method further includes receiving an interactive input in a location associated with the visual indicator. The received interaction input causes an identity selection menu to be generated on the page. When selection of a second identity other than the first identity is received, the method includes enabling a second set of privileges associated with the second identity. The reception of selection with the second identity enables a second presentation of content associated with a second user account.
US09342843B2
A method of collecting and indexing data by appending a tracking identifier (generated directly or indirectly by a tracking company) into a data file, wherein the data file is acquired from a computer system operated by a user. The data file could be data collected by a form made available through a website hosted by a web server. Additional data collected from other sources (stored as a record), such as a computer system operated by an agent, would be associated with the collected data file by an inquiry management company. The collected data and associated records are forwarded to a computer system that tracks online users and visitors. The process can many computer collected data (other than the data file) about website activity with other activities that are independent of the website.
US09342839B2
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a method for providing content. A search query is received. Search results responsive to the query are identified, including identifying a first search result in a top set of search results that is associated with a brand. Based at least in part on the query, one or more eligible content items are identified for delivery along with the search results responsive to the query. A determination is made as to when at least one of the eligible content items is associated with a same brand as the brand associated with the first search result. The first search result and one of the determined at least one eligible content items are combined into a combined content item and providing the combined content item as a search result responsive to the request.
US09342833B2
A method and system for facilitating relationships across multiple networks is described. The meta-network includes relationship information describing users, the networks to which such users belong, and the relationships that they have established within such networks. When a relationship is established in a network, it can be used to propagate relationships across any number of networks with the same or different users. The meta-network enhances the users' ability to search for information and manage their relationships across multiple networks. A user can search for other users according to one or more user-specified attributes. One or more users satisfying the user-specified attributes are identified, and a similarity measure may be determined for each of the identified users. A mapping interface is displayed to the user to enable the user to visually compare the identified users having a similarity measure within the displayed range. The mapping interface allows the user to invite one or more of the displayed users to establish a relationship with the user.
US09342830B2
A user captures an image of a payment card via a user computing device camera. An optical character recognition system receives the payment card image from the user computing device. The system performs optical character recognition and visual object recognition algorithms on the payment card image to extract text and visual objects from the payment card image, which are used by the system to identify a payment card type. The system may categorize the payment card as an open-loop card or a closed-loop card, or as a credit card or a non-credit card. In an example embodiment, the system allows or prohibits extracted financial account information from the payment card to be saved in the digital wallet account based on the determined payment card category. In another example embodiment, the system transmits an advisement to the user based on the determined payment card category.
US09342829B2
Systems and method are disclosed for multimedia capture and encrypting using an ephemeral messaging and multimedia application associated with a digital device for secured payment by selecting as a first user input a haptic control for a particular type of multimedia content to be captured; interacting as a second user input with a touch display of the digital device by touching a touch display and holding a touch contact of a user finger or stylus for a predetermined time; capturing multimedia content based on the contact and sending a command to a sensor, of the digital device to capture video and starting a timer to determine a duration of the touch contact of the user with the touch display; and making a secured payment with the digital device.
US09342827B2
A fleet management system for managing a fleet of encoded information reading (EIR) terminals can comprise one or more computers, a fleet management software module, and a payment processing software module in communication with the fleet management software module. The fleet management software module can be configured, responsive to receiving a customer initiated request, to generate an unlocking message upon processing a payment by the payment processing software module. The unlocking message can be provided by a bar code to be read by an EIR terminal, or by a bit stream to be transferred to an EIR terminal via network. Each EIR terminal can be configured to perform not more than a pre-defined number of EIR operations responsive to receiving the unlocking message.
US09342825B2
A software license and a software installation process are managed. A status of the license can be one of at least a third party reserved status, a requester reserved status, a requester allocated status, and an available status. A first module can be operative to change the status of the license from the third party reserved status to the requester allocated status in response to receiving a mode selection. The mode selection can correspond to one of one or more modes. The modes can comprise a reserve license mode, a remove reserve mode, a request license allocation mode, a return excess license to inventory mode, an ordering mode, and an add license to inventory mode. The first module can be operative in at least one of the modes.
US09342821B2
Managing discussion threads within an electronic communication system includes detecting that an electronic message sent from a sender to a first recipient is forwarded from the sender to a second recipient and, responsive to the detecting, identifying at least one electronic message related to the forwarded message exchanged between the sender and the second recipient as a virtual discussion thread. A client is notified of that the virtual discussion thread exists and is correlated with the electronic message from the sender. The virtual discussion thread is provided to the client of the first recipient.
US09342818B2
A system and method for managing incoming email messages. A computing device operating an email client receives an incoming email message from an email server. A first time rule is applied to a time attribute in the email header. The email message is saved in a hidden folder when the time attribute satisfies the first time rule. A second time rule is applied to a current time. When the current time satisfies the second time rule, email messages in the hidden folder are moved to a folder that is accessible to the email client.
US09342813B2
The present invention relates to an apparatus for displaying log information, comprising: a receiving unit for receiving at least one content and correlation information; the correlation information including correlation that correlates each of a plurality of segments formed at a display and each of the at least one content outputted to the plurality of segments, an output unit for outputting the at least one content to the plurality of segments based on the correlation information; and a processor; wherein the processor is configured to generate the log information including segment information and content information, the log information representing content output history, the segment information identifying each of the plurality of segments, and the content information identifying each of the at least one content, extract part of the log information based on either of the segment information or the content information, and output the extracted log information.
US09342812B2
In one aspect of the invention, a memory is described for facilitating splitting data by taxonomy. The memory is accessed by an application program, and includes one or more top-level categories, where each top-level category comprises a subset of the items; and also includes a category group corresponding to at least one of the top-level categories and the subset of the items belonging to the top-level categories.
US09342808B2
Techniques for implementing a load balanced server system are described which may be used for effecting electronic commerce over a data network. The system comprises a load balancing system and a plurality of servers in communication with the load balancing system. Each of the plurality of servers may include a respective data cache for storing state information relating to client session transactions conducted between the server and a particular client. The load balancing system can be configured to select, using a load balancing protocol, an available first server from the plurality of servers to process an initial packet received from a source device such as, for example, a client machine of a customer. The load balancing system can also configured to route subsequent packets received from the source device to the first server. Before generating its response, the first server may verify that the state information relating to a specific client session stored in the data cache is up-to-date. If the first server determines that the state information stored in the data cache is not up-to-date, then the first server may be configured to retrieve the desired up-to-date state information from a database which is configured to store all state information relating to client sessions which have been initiated with the server system.
US09342807B2
A management system includes a plurality of analyzers; and a computer system connected to the analyzers via a network, wherein each of the analyzers comprises: a data transmitter for transmitting data produced by the analyzer to the computer system via the network, and wherein the computer system includes a memory under control of a processor, the memory storing instructions enabling the processor to carry out operations, comprising: (a) receiving a plurality of data transmitted from the data transmitters of the plurality of analyzers; (b) generating an aggregate result used for determining a determination condition for making a determination as to whether or not a notification to a user of the analyzer is required based on the plurality of received data; and (c) outputting the aggregate result. A computer system and a method of providing information are also disclosed.
US09342802B2
A system of tracking rate of change of social network activity associated with a digital object includes a change measurement module in communication with at least one social network database and a ranking module in communication with the change measurement module. The change measurement module measures a change in the level of social network activity associated with the digital object based on a first object value and a second object value. The first object value is based on a measurement of activity associated with the digital object in at least one social network at a first time, and the second object value is based on a measurement of activity at a second time. The ranking module ranks the digital object relative to at least one other digital object based on a score derived from a rate of change in social network activity.
US09342797B2
Some embodiments provide systems and methods for enabling a learning implicit gesture control system for use by an occupant of a vehicle. The method includes identifying features received from a plurality of sensors and comparing the features to antecedent knowledge stored in memory. A system output action that corresponds to the features can then be provided in the form of a first vehicle output. The method further includes detecting a second vehicle output from the plurality of sensors and updating the antecedent knowledge to associate the system output action with the second vehicle output.
US09342794B2
Non-linear classifiers and dimension reduction techniques may be applied to text classification. Non-linear classifiers such as random forest, Nyström/Fisher, and others, may be used to determine criteria usable to classify text into one of a plurality of categories. Dimension reduction techniques may also be used to reduce feature space size. Machine learning techniques may be used to develop criteria (e.g., trained models) that can be used to automatically classify text. Automatic classification rates may be improved and result in fewer numbers of text samples being unclassifiable or being incorrectly classified. User-generated content may be classified, in some embodiments.
US09342790B1
A forecasting cohort includes a first set of forecasting algorithms and a second set of forecasting algorithms. An initial confidence level and a half-life of each of the first set of forecasting algorithms and the second set of forecasting algorithms are determined. A half-life weight for each of the first set of forecasting algorithms and the second set of forecasting algorithms at a subsequent time are determined, such that the half-life weights decrease an effect of a forecasting algorithm as time elapses. A combined confidence level of the forecasting cohort at the subsequent time is determined and used to adjust resource usage.
US09342788B2
A nondeterministic Turing machine (NTM) performs computations using a spatial binary enumeration system, a three-dimensional relation system, a simulated-human logic system, and a bijective-set memory system. The NTM may be used to perform a variety of computational tasks, such as multiple sequence alignment, factorization, and other nondeterministic polynomial algorithms in polynomial time. The NTM may be constructed by a deterministic Turing machine (DTM) using the four systems listed above.