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    MAPPING MULTI-DIMENSIONAL COORDINATES TO A 1D SPACE
    2.
    发明公开
    MAPPING MULTI-DIMENSIONAL COORDINATES TO A 1D SPACE 审中-公开

    公开(公告)号：US20240362389A1

    公开(公告)日：2024-10-31

    申请号：US18650648

    申请日：2024-04-30

    申请人： Imagination Technologies Limited

    发明人： Tijmen Spreij

    IPC分类号： G06F30/392 ,  G06T1/20 ,  G06T1/60 ,  G06T15/04

    CPC分类号： G06F30/392 ,  G06T1/20 ,  G06T1/60 ,  G06T15/04

    摘要： A circuit for mapping N coordinates to a 1D space receives N input bit-strings representing respective coordinates, which can be of different sizes; produces a grouped bit-string therefrom, in which the bits, including non-data bits, are grouped into groups of bits originating from the same bit position per group; and demultiplexes this into n=1 . . . N demultiplexed bit-strings, and sends each to a respective n-coordinate channel. The nth demultiplexed bit-string includes a respective part of the grouped bit-string that has n coordinate data bits and N-n non-data bits per group, and all other groups filled with null bits. Each but the N-coordinate channel includes bit-packing circuitry which packs down the respective demultiplexed bit-string by removing the non-data bits, and removing the same number of bits per group from the null bit.

    Spatio-Temporal Separable Filters
    3.
    发明公开
    Spatio-Temporal Separable Filters 审中-公开

    公开(公告)号：US20240354894A1

    公开(公告)日：2024-10-24

    申请号：US18437298

    申请日：2024-02-09

    申请人： Meta Platforms Technologies, LLC

    发明人： Grant Kaijuin YANG ,  Steven Paul LANSEL ,  Irad RATMANSKY ,  Bruce ZITELLI

    IPC分类号： G06T5/20 ,  G06F3/01 ,  G06T1/20

    CPC分类号： G06T5/20 ,  G06F3/013 ,  G06T1/20

    摘要： A filter system can effectively filter images with low computation cost by, instead of using large 2D filters, applying a series of smaller filters that require less compute and memory. In some implementations, the larger filter function, ƒ, is replaced by ƒ1, ƒ2, . . . , ƒN where ƒ(x)≈ƒ1(x)+ƒ2(x)+ . . . +ƒN(x). The filter system can apply these filters sequentially across multiple frames in time. The time integration of information by the human visual system results in the perception of a single higher quality filtering result, while using only the compute and memory footprint necessary to implement the filters. The number of frames across which a filter can be split without introducing flicker artifacts is dependent on the refresh rate of the display.

    GRAPHICS SYSTEM
    4.
    发明公开
    GRAPHICS SYSTEM 审中-公开

    公开(公告)号：US20240354887A1

    公开(公告)日：2024-10-24

    申请号：US18637735

    申请日：2024-04-17

    申请人： MEDIATEK INC.

    发明人： Yu-Hua WU ,  Yong-Guan LIAO ,  Kuan-Yu CHEN

    IPC分类号： G06T1/20

    CPC分类号： G06T1/20

    摘要： A graphics system is provided. The graphics system includes a frame buffer, a timing controller, and a processing unit. The processing unit generating an output video frame based on a raw video frame. The output video frame includes the main window and a picture-in-picture window overlaid on the main window, and the picture-in-picture window is generated by zooming in a target region of the main window. The timing controller is configured to generates a first vertical synchronization signals to control the input timing for the processing unit to write the raw video frame into the frame buffer, and generate a second vertical synchronization signal to control an output timing for the processing unit to read the raw video frame from the frame buffer and generating the output video frame, such that specific timing conditions are met.

    Fault detection in a real-time image pipeline
    6.
    发明授权
    Fault detection in a real-time image pipeline 有权

    公开(公告)号：US12125122B2

    公开(公告)日：2024-10-22

    申请号：US17556161

    申请日：2021-12-20

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Mihir Narendra Mody ,  Niraj Nandan ,  Ankur Ankur ,  Mayank Mangla ,  Prithvi Shankar Yeyyadi Anantha

    IPC分类号： G06T1/20 ,  G06F9/48 ,  G06F11/10 ,  G06T1/60

    CPC分类号： G06T1/20 ,  G06F9/4812 ,  G06F11/1004 ,  G06T1/60

    摘要： A technique including receiving an image stream for processing; processing the received image stream in a real time mode of operation; outputting an indication that an image processing pipeline has begun processing the received image stream; receiving, in response to the indication, first configuration information associated with test data for testing the image processing pipeline; switching the image processing pipeline to a non-real time mode of operation to process the test data based on the first configuration information during a vertical blanking period of the received image stream; loading the test data from an external memory; switching an input of the image processing pipeline from the image stream to the test data; determining a checksum based on the processed test data; comparing the determined checksum to an expected checksum to determine that the test data was successfully processed; and outputting an indication that the test data was successfully processed.

    Instruction prefetch based on thread dispatch commands
    7.
    发明授权
    Instruction prefetch based on thread dispatch commands 有权

    公开(公告)号：US12124852B2

    公开(公告)日：2024-10-22

    申请号：US18347964

    申请日：2023-07-06

    申请人： Intel Corporation

    发明人： James Valerio ,  Vasanth Ranganathan ,  Joydeep Ray ,  Pradeep Ramani

    IPC分类号： G06F9/44 ,  G06F9/38 ,  G06F13/28 ,  G06T1/20

    CPC分类号： G06F9/3802 ,  G06F13/28 ,  G06T1/20

    摘要： A graphics processing device is provided that includes a set of compute units to execute a workload, a cache coupled with the set of compute units, and circuitry coupled with the cache and the set of compute units. The circuitry is configured to, in response to a cache miss for the read from a first cache, broadcast an event within the graphics processor device to identify data associated with the cache miss, receive the event at a second compute unit in the set of compute units, and prefetch the data identified by the event into a second cache that is local to the second compute unit before an attempt to read the instruction or data by the second thread.

    TASK DEPENDENCIES
    8.
    发明公开
    TASK DEPENDENCIES 审中-公开

    公开(公告)号：US20240345888A1

    公开(公告)日：2024-10-17

    申请号：US18621392

    申请日：2024-03-29

    申请人： Imagination Technologies Limited

    发明人： Ian King

    IPC分类号： G06F9/50 ,  G06T1/20

    CPC分类号： G06F9/5038 ,  G06T1/20

    摘要： A method of managing task dependencies within a task queue of a GPU determines a class ID and a resource ID for a task and also for any parent task of the task and outputting the class IDs and resource IDs for both the task itself and any parent task of the task for storage associated with the task in a task queue. The class ID identifies a class of the task from a hierarchy of task classes and the resource ID of the task identifies resources allocated and/or written to by the task.

    Graphics rendering method and apparatus
    9.
    发明授权
    Graphics rendering method and apparatus 有权

    公开(公告)号：US12118642B2

    公开(公告)日：2024-10-15

    申请号：US17516479

    申请日：2021-11-01

    申请人： HUAWEI TECHNOLOGIES CO., LTD.

    发明人： Pan Zhang ,  Liang Li ,  Wei Huang

    IPC分类号： G06T1/20 ,  G06T1/60

    CPC分类号： G06T1/20 ,  G06T1/60

    摘要： This application provides a graphics rendering method and apparatus. A service starts an application and obtains a rendering instruction sent by the application; and sends the rendering instruction to an electronic device. The electronic device performs graphics rendering according to the rendering instruction, to display an image related to the application. According to the technical solutions provided in this application, the electronic device, instead of the server, can perform graphics rendering according to the rendering instruction, thereby improving picture quality and user experience.