Semiconductor chip pick-up method
    1.
    发明授权
    Semiconductor chip pick-up method 有权
    半导体芯片拾取方式

    公开(公告)号:US06759274B2

    公开(公告)日:2004-07-06

    申请号:US09929103

    申请日:2001-08-15

    IPC分类号: H01L21304

    摘要: A method of picking up a plurality of semiconductor chips formed by dividing a semiconductor wafer comprises the step of adhesively holding the plurality of semiconductor chips on an elastic adhesive pad which has innumerable pores in the surface and generates adhesion force when negative pressure is produced by the pores crushed by restoration force generated by elasticity and adhesion, and the step of picking up the semiconductor chips in a state of air in the pores being expanded by heating the elastic adhesive pad which adhesively holds the plurality of semiconductor chips at a predetermined temperature.

    摘要翻译: 拾取通过划分半导体晶片形成的多个半导体芯片的方法包括将多个半导体芯片粘合地保持在表面上具有无数孔的弹性粘合垫上并产生粘合力的步骤,当由 通过由弹性和粘附力产生的恢复力而破碎的细孔,以及通过加热粘合地将多个半导体芯片保持在预定温度的弹性粘合剂垫,在孔中的空气中拾取半导体芯片的步骤被扩大。

    Method for forming shallow trench isolations
    2.
    发明授权
    Method for forming shallow trench isolations 有权
    形成浅沟槽隔离的方法

    公开(公告)号:US06221785B1

    公开(公告)日:2001-04-24

    申请号:US09154778

    申请日:1998-09-17

    申请人: Yu-Chung Tien

    发明人: Yu-Chung Tien

    IPC分类号: H01L21304

    CPC分类号: H01L21/76232 H01L21/76224

    摘要: A method for forming shallow trench isolations includes the steps of defining a wafer substrate, forming a silicon dioxide insulating layer on the substrate, depositing a silicon nitride layer on the silicon dioxide insulating layer, and forming at least one trench in the substrate through the silicon dioxide and silicon nitride layers. The method also includes the steps of depositing a silicon dioxide layer over the silicon nitride layer and in the trench, removing the silicon dioxide layer deposited over the silicon nitride layer, anisotropically etching the silicon dioxide layer to produce silicon dioxide sidewalls in the trench contiguous with the silicon nitride layer, isotropically etching to remove the sidewalls and removing the silicon nitride layer.

    摘要翻译: 用于形成浅沟槽隔离的方法包括以下步骤:限定晶片衬底,在衬底上形成二氧化硅绝缘层,在二氧化硅绝缘层上沉积氮化硅层,以及在衬底中通过硅形成至少一个沟槽 二氧化氮和氮化硅层。 该方法还包括以下步骤:在氮化硅层上方和沟槽中沉积二氧化硅层,去除沉积在氮化硅层上的二氧化硅层,各向异性地蚀刻二氧化硅层,以在邻接的沟槽中产生二氧化硅侧壁 氮化硅层,各向同性蚀刻以去除侧壁并去除氮化硅层。

    Etch process for dielectric materials comprising oxidized organo silane materials
    3.
    发明授权
    Etch process for dielectric materials comprising oxidized organo silane materials 失效
    包括氧化有机硅烷材料的电介质材料的蚀刻工艺

    公开(公告)号:US06762127B2

    公开(公告)日:2004-07-13

    申请号:US09938432

    申请日:2001-08-23

    IPC分类号: H01L21304

    摘要: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).

    摘要翻译: 本发明提供一种用于蚀刻C掺杂氧化硅层的新颖蚀刻技术,例如部分氧化的有机硅烷材料。 这种在低偏压和低至中压下使用CH2F2 / Ar化学的技术为氧化硅提供了高蚀刻选择性,并提高了对有机光致抗蚀剂的选择性。 根据新技术蚀刻包括沉积在氧化硅层(1002)上的部分氧化的有机硅烷材料层(1004)的结构,形成相对窄的沟槽(1010,1012,1014,1016,1030,1032,1034和 1036)和较宽的沟槽(1020,1022,1040和1042)。 该技术也适用于形成双镶嵌结构(1152,1154和1156)。 在另外的实施例中,提供制造系统(1410)用于制造本发明的IC结构。 这些系统包括适于与多个制造站(1420,1422,1424,1426和1428)相互作用的控制器(1400)。

    Rotary mechanical buffing method for deflashing of molded integrated circuit packages
    4.
    发明授权
    Rotary mechanical buffing method for deflashing of molded integrated circuit packages 有权
    用于模制集成电路封装的去屑的旋转机械抛光方法

    公开(公告)号:US06629880B1

    公开(公告)日:2003-10-07

    申请号:US09738953

    申请日:2000-12-14

    IPC分类号: H01L21304

    摘要: A system comprising a rotary buffing device for removing the mold-flash from leadless leadframe substrate panels is described. The leadless leadframe substrate panels have bottom surfaces that contain electrical contact landing and die attach pad surfaces. Covering at least some of the surfaces of the electrical contact landings and the die attach pads are formations of mold-flash, which are thin layers of molding material. The rotary buffing device is rotated at a sufficiently high rate such that the formations of flash are brushed (or buffed) off the bottom surfaces as the rotary wheel is run along the substrate panels.

    摘要翻译: 描述了一种包括用于从无引线框架基板面板移除模具闪光的旋转抛光装置的系统。 无引线框架基板面板具有包含电接触着落和管芯附接焊盘表面的底表面。 覆盖电接触平台和模具附接垫的至少一些表面是模制闪光的形成,其是模制材料的薄层。 旋转抛光装置以足够高的速率旋转,使得当旋转轮沿着衬底面板行进时,闪光的形成被刷(或抛光)离开底表面。

    Chuck assembly for use in a spin, rinse, and dry module and methods for making and implementing the same
    5.
    发明授权
    Chuck assembly for use in a spin, rinse, and dry module and methods for making and implementing the same 失效
    用于旋转,冲洗和干燥模块的卡盘组件及其制造和实施方法

    公开(公告)号:US06578853B1

    公开(公告)日:2003-06-17

    申请号:US09747665

    申请日:2000-12-22

    IPC分类号: H01L21304

    摘要: A chuck assembly for use in a substrate spin, rinse, and dry (SRD) module is provided. The chuck assembly includes a wedge, a chuck body, and a plurality of grippers. The wedge has a sidewall and is designed to move from a lower position to an upper position and from the upper position to the lower position thus opening and closing the chuck assembly, respectively. The chuck body has a cylindrical shape and is designed to include a plurality of linkage arms. The chuck body is designed to enclose the wedge such that each linkage arm is substantially in contact with the sidewall of the wedge. The cylindrical shape of the chuck body is designed to reduce air disturbance around a surface of a substrate. The plurality of grippers are designed to be coupled to the chuck body via a plurality of rotation pins. Each of the grippers is configured to stand substantially upright so as to engage the substrate when the wedge is in a lower position, and each of the grippers is configured to lie substantially flat so as to disengage the substrate when the wedge is in the lower position.

    摘要翻译: 提供了一种用于衬底旋转,冲洗和干燥(SRD)模块的卡盘组件。 卡盘组件包括楔形物,卡盘主体和多个夹具。 楔形件具有侧壁并且被设计成从下部位置移动到上部位置并且从上部位置移动到下部位置,从而分别打开和关闭卡盘组件。 卡盘体具有圆筒形状并且被设计成包括多个连杆臂。 卡盘体被设计成围绕楔形物,使得每个连杆臂基本上与楔形物的侧壁接触。 卡盘体的圆柱形被设计成减小基体表面周围的空气扰动。 多个夹持器被设计成经由多个旋转销耦合到卡盘主体。 每个夹持器构造成基本上竖直地站立,以便当楔形件处于较低位置时接合基板,并且每个夹具构造成基本上平坦,以便当楔形件处于较低位置时使基板脱离 。

    Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication
    6.
    发明授权
    Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication 有权
    用于在存储器阵列制造期间蚀刻隧道氧化物以减少底切的方法和系统

    公开(公告)号:US06472327B2

    公开(公告)日:2002-10-29

    申请号:US09925205

    申请日:2001-08-08

    IPC分类号: H01L21304

    摘要: A method and system for etching gate oxide during transistor fabrication is disclosed. The method and system begin by depositing a gate oxide on a substrate, followed by a deposition of a tunnel oxide mask over a portion of the gate oxide. The method and system further include performing a combination dry/wet-etch to remove the gate oxide uncovered by the tunnel oxide mask, which minimizes tunnel oxide undercut.

    摘要翻译: 公开了在晶体管制造期间蚀刻栅极氧化物的方法和系统。 该方法和系统首先通过在衬底上沉积栅极氧化物,然后在栅极氧化物的一部分上沉积隧道氧化物掩模。 该方法和系统还包括执行干/湿蚀刻组合以去除未被隧道氧化物掩模覆盖的栅极氧化物,其使隧道氧化物底切最小化。

    Method for forming shallow trench isolations
    7.
    发明授权
    Method for forming shallow trench isolations 有权
    形成浅沟槽隔离的方法

    公开(公告)号:US06403496B2

    公开(公告)日:2002-06-11

    申请号:US09754146

    申请日:2001-01-05

    申请人: Yu-Chung Tien

    发明人: Yu-Chung Tien

    IPC分类号: H01L21304

    CPC分类号: H01L21/76232 H01L21/76224

    摘要: A method for forming shallow trench isolations includes the steps of defining a wafer substrate, forming a silicon dioxide insulating layer on the substrate, depositing a silicon nitride layer on the silicon dioxide insulating layer, and forming at least one trench in the substrate through the silicon dioxide and silicon nitride layers. The method also includes the steps of depositing a silicon dioxide layer over the silicon nitride layer and in the trench, removing the silicon dioxide layer deposited over the silicon nitride layer, anisotropically etching the silicon dioxide layer to produce silicon dioxide sidewalls in the trench contiguous with the silicon nitride layer, isotropically etching to remove the sidewalls and removing the silicon nitride layer.

    摘要翻译: 用于形成浅沟槽隔离的方法包括以下步骤:限定晶片衬底,在衬底上形成二氧化硅绝缘层,在二氧化硅绝缘层上沉积氮化硅层,以及在衬底中通过硅形成至少一个沟槽 二氧化氮和氮化硅层。 该方法还包括以下步骤:在氮化硅层上方和沟槽中沉积二氧化硅层,去除沉积在氮化硅层上的二氧化硅层,各向异性地蚀刻二氧化硅层,以在邻接的沟槽中产生二氧化硅侧壁 氮化硅层,各向同性蚀刻以去除侧壁并去除氮化硅层。

    Method of spin etching wafers with an alkali solution
    9.
    发明授权
    Method of spin etching wafers with an alkali solution 有权
    用碱溶液旋转蚀刻晶片的方法

    公开(公告)号:US06743722B2

    公开(公告)日:2004-06-01

    申请号:US10059701

    申请日:2002-01-29

    申请人: Salman M. Kassir

    发明人: Salman M. Kassir

    IPC分类号: H01L21304

    CPC分类号: H01L21/30608 Y10S438/977

    摘要: A method of relieving surface stress on a thin wafer by removing a small portion of the wafer substrate, the substrate being removed by applying a solution of KOH to the wafer while the wafer spins.

    摘要翻译: 通过去除晶片衬底的一小部分来减轻薄晶片上的表面应力的方法,通过在晶片旋转时将KOH溶液施加到晶片来除去衬底。

    System for removal of photoresist using sparger
    10.
    发明授权
    System for removal of photoresist using sparger 有权
    使用喷射器去除光刻胶的系统

    公开(公告)号:US06649018B2

    公开(公告)日:2003-11-18

    申请号:US10052823

    申请日:2002-01-17

    IPC分类号: H01L21304

    CPC分类号: G03F7/423

    摘要: A process and system for removing photoresist from semiconductor wafers comprises applying pressure in excess of one atmosphere to ozone, mixing the ozone with ambient temperature or higher deionized water via a sparger plate, and exposing the semiconductor wafers to the mixture of ozone and deionized water. The system is comprised of a tank capable of holding the semiconductor wafers, a sparger plate within the tank, a source of ozone connected to the tank, a source of deionized water connected to the tank; and finally a means for recirculating the deionized water connected to the tank. No chiller is included in the system as required by the prior art.

    摘要翻译: 用于从半导体晶片去除光致抗蚀剂的工艺和系统包括向臭氧施加超过一个大气压的压力,通过喷雾器将臭氧与环境温度或更高的去离子水混合,并将半导体晶片暴露于臭氧和去离子水的混合物。 该系统包括能够保持半导体晶片的罐,罐内的分布器板,连接到罐的臭氧源,连接到罐的去离子水源; 并且最后是用于再循环连接到罐的去离子水的装置。 根据现有技术的要求,系统中不包括冷却器。